Which element to use in LTspice for this strange node label in CircuitLab?

Question

In the Ultimate Electronics interactive online book, there is a section called Voltage-Controlled Switch. In this section there are are 7 examples of how to use a voltage-controlled switch.

The last example (#7) states:

7. Finally, we can use a voltage within the circuit itself as the trigger. This example is a bit more complicated, but it uses the fact that the voltage-controlled switch model has hysteresis. Hysteresis means that after the switch changes from one state to the other, there’s some memory so that a larger wiggle is required to get it to switch back to the first state. This is configured within the V_H parameter of the switch SW2. Double-click SW2, try changing the hysteresis voltage V_H, and re-run the simulation:

with a link to these interactive schematics:

Within this schematic there is a strange node label “+5V” (a “Named node” by the CircuitLab terminology) which I've circled in red. While hovering the mouse over this node, CircuitLab shows that this node's DC voltage is indeed +5 V (shown below), even though it's never connected to a voltage source elsewhere in the schematic.

When converting these schematics to LTspice, I decided to replace this "named node" with an explicit voltage source to obtain the same result (for the output voltage value in the time-domain simulation), but without success. I got either a constant value, or the simulation simply didn't work (no window for the waveform viewer; dimmed icon for the “run simulation” symbol). I was forced to halt the simulation with Ctrl + H.

I also tried a different connection of this voltage source (V2), for example this one:

Its netlist (without the first line):

V1 N001 0 12V
C1 out 0 22mF
R1 out 0 6Ω
R2 out N003 6Ω
SW1 N001 N003 N002 out S1
V2 N002 out 5V
.tran 5
.model S1 SW(Vh=-.75 Ron=.1 Vt=2.5)
* By https://ultimateelectronicsbook.com/switches/#voltage-controlled-switch\n\n(option 7)
.backanno
.end

How can I make this work in LTspice (I use version 17.1.14)?

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UPDATE:

My question is expressed in its title. I am not interested in other solutions. I want to substitute that strange CircuitLab label (which implies a DC voltage) with something accessible within LTspice.

Why? For any instance in the future where I encounter this same label type in some totally different circuit in CircuitLab.

Here's another thing I tried (the result of its simulation was a constant voltage, about 2.15 V for the “out” node):

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UPDATE 2:

The circuit, which (almost) exactly matches the circuit in CircuitLab, is this one:

The result: no window for the waveform viewer; just a dimmed icon for the “run simulation” symbol. I was forced to halt the simulation with Ctrl + H.

Why almost exactly?

Because:

1. LTspice doesn't allow zero resistance for a closed switch, so I used 0.001 Ω (1 milliohm) instead.

2. CircuitLab has only 3 adjustable parameters for a voltage-controlled switch (R_ON, V_T, V_H), and LTspice has an additional 4 (Roff, Lser, Vser, Ilimit). Namely, Lser (series inductance) and Vser (series voltage), both with default values of 0.0, may play some role in the result.

Answer 1

Every time CircuitLab encounters a node with a name that implies some fixed potential, like "+5V" or "−12", beheind the scenes it inserts a voltage source to produce that potential. The following are equivalents in CircuitLab:

^{simulate this circuit – Schematic created using CircuitLab}

The name "P5" is arbitrary, Since CircuitLab interprets "+5V" as being attached to a hidden 5V source, you can't use such names for regular nodes. This can be convenient, since it permits schematics with implied voltage sources, but where none are actually shown, which might otherwise clutter up the schematic:

^{simulate this circuit}

Using explicit voltage sources, the equivalent would be:

^{simulate this circuit}

Notice that all the source are with respect to ground. In other words, one side is always connected to ground, otherwise terms like "+5V" and "−100V" would be meaningless.

LTspice doesn't interpret node names like this, so while you can actually use the name "+5V", it will not include any implied voltage source. You can however define those sources explicitly like I did above in one part of the schematic, and make implied connections to them elsewhere:

Your own LTspice schematic can be adapted to use the same technique:

A transient analysis usually begins with an implied .op operating point analysis, to establish starting conditions. A .op is not about stepping through time, it's about state after a long time, long enough for all capacitors to have charged to a steady voltage, and all inductors have settled to some steady current. The .op "thinking" in your case would go like this:

1. S1 is open. After a long time C1 will have discharged to 0V.
2. S1 will therefore have 0V input, causing it to close.
3. S1 is therefore initially closed, in fact. Try again.
4. S1 is closed. C1 will eventually charge to 6V.
5. S1 will therefore have 6V input, causing it to open.
6. S1 is therefore initially open, in fact. Try again from step 1

The loop never ends, and the .tran proper can never even get started.

To solve this problem, tell the .tran analysis to skip the implied .op, using the uic flag. In the above LTspice schematic, notice how the .tran directive has the uic flag, to skip calculation of initial conditions.

You will also find a checkbox in the simulation dialogue box to add the uic flag for you:

Now you should see the correct simulation results:

If you really require an operating point analysis, perhaps for simulation of other parts of the circuit, then an alternative approach would be to have the 12V source start at zero, and rise to 12V after a microsecond or so, so oscillation does not occur initially, and the .tran begins in a state where a steady state can be established. That can be done using a piecewise voltage source PWL(0 0 1u 0 2u 12):

There are probably a dozen ways you can prevent .op from failing like that, and they would all involve avoiding the situation where there exists no steady-state condition that doesn't contradict itself.

Answer 2

You did not wire up the voltage source correctly. The negative terminal of the voltage source should be connected to ground, not to OUT.

Here is the circuit with the +5V node replaced by a voltage source V2, and closer to the layout of your circuits.

^{simulate this circuit – Schematic created using CircuitLab}

With the parameters for SW1 set at V_T = 2.5 and V_H = 1.5, the output looks like this:

In the edited version of the question, there is a circuit similar to this, but with the parameters for the switch set at Vt = 2.5 and Vh = -0.75. Try changing Vh to 1.5 as in the original circuit.

Answer 3

If you want the switch to actually "switch", then the voltage that controls it should likely be a pulse voltage source that changes voltage at some point...rather than a solid DC voltage that never changes.

In the example below, the voltage source controlling the switch starts off at zero, which means the switch is open (it is below the switch's threshold voltage of 0.5V).

Initially, the switch is open, so the TRAN does a solution as if the switch resistance is 10MEGohm...so C1 is mostly discharged. The switch is open because V1 is initially 0V.

But very shortly after zero seconds (as the transient run begins), switch S1 closes, and becomes 0.001 ohms...because V1's voltage is above threshold

Then at two seconds, voltage of source V1 falls below 1V, which is below threshold, so the switch resistance changes from .001 ohms to 10MEG in a short span of time.

Note that the switch control voltage source (here V1) is grounded. Control is isolated from the switch function. No current flows from V1. Grounding isn't necessary, but having one of V1's terminals at a solidly stable point (ground) eases my mind.