Low Voltage PCB Creepage Requirements

Question

Both 60950 (Table 2N – Minimum creepage distances) and 60335 (Table 18 – Minimum creepage distances for functional insulation) seem to specify a minimum creepage distance of 0.4mm (~16mil) with a IIIa / IIIb material group and pollution degree of 2 at <=10V.

This seems crazy big, and I know that many boards are in production with significantly smaller spacing between low voltage traces. With the pad spacing between common microcontroller pins, for example, this is impossible to achieve. Am I understanding this requirement correctly?

Answer 1

A little research I did myself on this topic lead me to this:

Creepage and clearance is determined according to the requirements set out in EN 60335-1. According to clause 29.2 the pollution degree is assumed to be 2. The material group of standard FR4 bare board material falls into group IIIa.

The clearance rating for functional insulation within the SELF domain is found by looking up the rated impulse voltage for < 50 V systems in Table 15, over voltage category II = 500 V and then looking up the minimum clearance value in table 16.

Table 16 (note d) For tracks of printed circuit boards this value is reduced to 0.2 mm for pollution degree 1 and pollution degree 2.

The creepage for functional insulation is found in Table F.4 of EN 60664-1. As described in table 18.

Table 18 (NOTE 3) For tracks on printed wiring boards under pollution degree 1 and pollution degree 2 conditions, the values specified in Table F.4 of IEC 60664-1 apply. For voltages less than 100 V, the values must not be less than those specified for 100 V.

Table F.4 of EN 60664-1 gives us the value of 0.160 mm. Because this creepage is smaller than the clearance of 0.2 mm this creepage is overruled by the clearance.