# Using GPIO in Altera

I'm trying to test the GPIO functionality of Altera (DE1, Cyclone II) with this simple program.

If the GPIO_0[0] gets a high (1) signal, LEDG[0] will light up. If it receives a low (0) signal, LEDG[0] will turn off.

For the input signal, I am asserting 5 and 0 VDC.

Here's my code:

module gpio_test (CLOCK_50, GPIO_0, LEDG);
input   CLOCK_50;
input   [35:0]  GPIO_0;
output  [7:0]   LEDG;

reg [7:0] LED;

assign LEDG = LED;

always @ (posedge CLOCK_50)

if (GPIO_0[0] == 1) // if GPIO received a high signal
LED <= 1; // turn LED on
else if (GPIO_0[0] == 0) // if GPIO received a low signal
LED <= 0; // turn LED off

endmodule


The problem is, it seems that GPIO_0[0] is always receiving a high signal (even though I assert a high or low signal) because the LED is always on. Assuming that my pin assignments are correct, what went wrong?

• Do you assert the clock down/up? May 21, 2015 at 4:21
• The internal clock CLOCK_50 does that automatically May 21, 2015 at 4:52
• I'd suggest to double check if you are really "clocking". May 21, 2015 at 8:19
• Have you correctly assigned the pins in Pin Planner? Jun 3, 2015 at 4:16
• @TomCarpenter Yes, I have. Jun 3, 2015 at 10:18

Most likely the problem is the pins assignment, make sure they are assigned correctly. Posting the pin assignment here might help us find the problem.

Anyway, Please test it without a clock and let us know.

module gpio_test (CLOCK_50, GPIO_0, LEDG);
input   CLOCK_50;
input   [35:0]  GPIO_0;
output  [7:0]   LEDG;

assign LEDG[0] = GPIO_0[0];

endmodule


Sorry for posting this late. I have finished the project I'm working on months ago. The code above worked, there is nothing wrong in my code and in the pin assignments. The problem is on my hardware connection.

During my testing, wherein I used the code above, I connected the GPIO pin for input to an LDR (light dependent resistor). That being said, since the output of LDR is not really digital, the input GPIO is not getting proper signals. That's why it is not producing the desired output.

Garbage in, garbage out.

The code above worked when I introduced Arduino to perform as my ADC.

I would appreciate if someone backs up my explanation with in a more technical manner.

Considering your self-answer, the issue was the input signal which didn't have proper logic levels.

A typical approach to deal with signals with significant noise, intermediate voltage levels or slow edges is to use a Schmitt trigger. Those are build-in in most MCUs, notably, in Arduino digital pins and Raspberry Pi GPIO, so they are often perceived as a given by hobbyists.

In FPGAs, Schmitt triggers are often not implemented because they would prevent the pins from being used at their maximum speed with proper digital signals. If you need those, you can pick an FPGA which has them (in case of Altera/Intel that would be MAX II and MAX V devices), or add an external Schmitt trigger or ADC IC.