I have a Verilog module that is able to make my FPGA blink its LEDs at frequencies according to certain variables/constants I've set within the code. However, I would like to change these variables externally, so that I can alter the blink pattern on the fly without having to reprogram the FPGA every time. That's why I've considered trying to figure out how to transfer data to the FPGA board perhaps via the Ethernet port.

The FPGA board I have is the Digilent Nexys 3 with the Spartan-6 FPGA. I am using the Xilinx ISE with Webpack license to do designing and programming.

I've read some of the documentation, but a lot of it is hard to understand. From what I understand, I need to use create an Ethernet IP core. I did that on ISE by adding an IP Core as a source and selecting "Ethernet 1000BASE-X PCS/PMA or SGMII." Doing so created an .xco file in the design hierarchy. I clicked "View HDL Functional Model" and saw that there is a module defined along with many ports. The ports don't seem to match the pins listed in the Nexys 3 reference manual though. The Ethernet on the Nexys 3 board has the SMCS part number LAN8710.

Another method I've considered is using the Digilent Adept software to write data into the registers on the Register I/O tab. Apparently the range of values that can be input for the addresses is from 0 to 255 (8 bits). The problem is I don't know how to map these Registers onto the variables within the module (if that's even possible).

This is the first time I've been working with FPGA's (been at it for about a month), with little to no digital electronics background (I'm an undergraduate Physics Major), though I do have some programming experience as well as computer hardware and networking experience (CompTIA N+ certified). Anything info you can give to help a newbie along would be appreciated.

  • \$\begingroup\$ An Ethernet IP core will have ports that you can use programmatically that correspond to the functional inputs and outputs that would be used for reading and writing. They do not correspond to the physical RJ45 pins (if that is what you expected). \$\endgroup\$
    – nanofarad
    Commented Jul 17, 2015 at 0:41
  • 5
    \$\begingroup\$ If you are new to this, I would start with something much simpler than Ethernet. For the Ethernet to work it will require a lot more than just the Ethernet controller. The board you have has a USB-UART adapter on it which is connected to the FPGA, so I would start by writing a simple UART receiver interface (they aren't too difficult and it would be a good learning experience). \$\endgroup\$ Commented Jul 17, 2015 at 1:54
  • 1
    \$\begingroup\$ @Tom Carpenter +1. Simply wiring up an Ethernet core definitely counts as an advanced level project. \$\endgroup\$
    – user16324
    Commented Jul 17, 2015 at 11:33

2 Answers 2


I am not familiar with your environment (Nexys 3, etc), but I think the following should be correct in general. When you add the IP core, it creates a block of logic inside the FPGA with the ports being the interfaces internal to the FPGA. Most of the interfaces, you need to connect to internal logics that you define. Parts of the interfaces, you may map to actual external I/O pins. For the external controller LAN8710 on board, it duplicates the function of the IP core with the added necessary physical network interface. Either the LAN8710 or the IP core only provides you with the lower, hardware layers of the networking stacks (the IP core probably does not include the physical layer/interface). The next level would be the TCP/IP(Internet Protocol) layer (assuming you want a standard stack), which is usually implemented in software of a processor.

Therefore, the IP core or LAN8710 after integrated with your logic (not trivial) still leaves you with big gaps (e,g. the TCP/IP and higher layers) with what you want to do. Instead, try the USB-UART idea. Or try an external UART to Ethernet or Wifi converter module.


The LAN8710 is a 10/100 mbps PHY, which you interface to using a standard interface known as MII (or a variant of that called RMII).

You've selected a block of IP in the FPGA which is for 1000mbps Ethernet, which uses several different interfaces to a PHY, none of which is MII/RMII).

You need to start by choosing an IP block which supports 10/100 networking, and then make sure you select an MII or RMII interface, whichever is suitable for your hardware. If your hardware has four data lines in each direction, it's using MII, if it has two in each direction then it's using RMII.

As other people have hinted, getting the MAC (the bit in the FPGA) talking to the PHY (the LAN8710) is a tiny part of a huge effort of talking to other things on a network, and you maybe taking on more than is sensible at this stage.


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