0
\$\begingroup\$

How can I erase the bitstream that is stored in flash memory from an FFPGA (Flash FPGA, e.g. MAX10) using a microcontroller or any other logic?

I analyzed MAX10 documentation and still didn't find any easy (and fully documented) solution.

It seems like I could use the Altera On-Chip Flash IP Core, but it requires to power up the FPGA, load the bitstream, and then eventually erase the proper CFM memory. Maybe I could use JTAG In-System Programming and somehow invoke ISC_ERASE command? Is there any other way that requires less power?

\$\endgroup\$
5
  • \$\begingroup\$ Erasing flash requires power. What do you mean by 'power' anyway? An 'IP Core' is something that a system-on-chip designer can license but it's probably equal to what's in Alteras own chips. \$\endgroup\$
    – user1890202
    Commented Feb 24, 2017 at 10:02
  • \$\begingroup\$ MAX10 has two different flash-memories, which one so you want to erase and why? Is this part of your application, like say you want your device to self-destruct or erase a crypto-key? \$\endgroup\$
    – user1890202
    Commented Feb 24, 2017 at 10:04
  • 1
    \$\begingroup\$ @user1890202: I want to erase configuration memory, not UFM, but I think erasing both memories can be done the same way. Yes, this is part of my application. I would like to erase bitstream before FPGA enters user mode (page 491 in MAX10 Handbook). \$\endgroup\$
    – Qiu
    Commented Feb 24, 2017 at 10:22
  • \$\begingroup\$ that means that once you loose power your product is dead. Is that what you want? \$\endgroup\$
    – user1890202
    Commented Feb 24, 2017 at 10:54
  • \$\begingroup\$ @user1890202: no, it should be dead once microcontroller decide it should be cleared. \$\endgroup\$
    – Qiu
    Commented Feb 25, 2017 at 11:55

1 Answer 1

Reset to default
1
\$\begingroup\$

The JTAG commands required to program or erase the FPGA are defined by IEEE Std 1532

https://standards.ieee.org/findstds/standard/1532-2002.html

The manufacturere should provide a BSDL file that defines the command set for your specific FPGA. Having both the BSDL file the IEEE 1532, and the IEEE 1149 standards should together provide all the information required to send the

You first need to send the ISC_ENABLE command to enter programming mode. Then send ISC_ERASE, to erase the portion of flash memory.then ISC_DISABLE when you are done.

\$\endgroup\$
1
  • \$\begingroup\$ I figured that out, but this solution seems to work only when Verify protect feature is off. Anyway, I hope that there is other solution. \$\endgroup\$
    – Qiu
    Commented Mar 23, 2017 at 6:59

Your Answer

By clicking “Post Your Answer”, you agree to our terms of service and acknowledge you have read our privacy policy.

Not the answer you're looking for? Browse other questions tagged or ask your own question.