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[Original question: CCD output buffer; seemed best to make the transistor part a separate post]



Taken from Wikipedia, the circuit in Fig. 1 acts as a common collector (high input impedance - low output impedance, voltage buffer).

Fig. 1:

enter image description here

In my application, the devices' datasheet (a CCD chip) suggests buffering the output, like in Fig. 2. That is the same as the "classic" CC above, with the notable exception of the 130 Ohm resistor.

What is it used for? The one thing I can think of is to help with biasing, but how will that affect the equations given in Wikipedia?

Bonus question: How much non-linearity can be expected from a CC, roughly speaking?
Let's say the CCD's Vout (before the CC buffer) ranges from 0 - 12V.


Fig. 2: enter image description here

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  • \$\begingroup\$ I first "flashed" towards \$C_\text{BE}\$ since this is a video circuit. But perhaps the simpler answer may be: (1) making sure that the base-emitter junction is fully off and the output passively pulled to ground if the base pin isn't connected; and, (2) a desired shift in the quiescent/average DC output point (which will also depend on the source impedance of what's driving it.) Perhaps you could provide more context? \$\endgroup\$ – jonk Jan 6 at 23:32
  • \$\begingroup\$ @jonk: More context is in my initial post (link provided above), and in the CCDs' datasheet (KAF-8300, page 5 - 6). It says "To activate the output structure, an off-chip load must be added to the VOUT pin of the device, see fig. 5". \$\endgroup\$ – user2286339 Jan 7 at 0:06
  • \$\begingroup\$ Can you define the Vb average dc and the source impedance for source current avail? \$\endgroup\$ – Sunnyskyguy EE75 Jan 7 at 2:15
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How were the resistors' values chosen?

  • No idea what I/O specs they had in mind, but linearity for 800mV biased at 6V with 150MHz BW for some load pF + DC load variable range perhaps 75 Ohms is possible with 400mW extra DC power.

  • The advantage is being able to drive coax with a 75 Ohm termination.

Does the Iout of 5.4mA indicate it is acting as a constant current sink?

. Probably peak DC + AC current.

  • Zout spec is 100 min 180 max ohms (Table 6)
    • Signal 655 mV max Monochrome
    • DC bias current + ac current. must be for 6Vdc + 330mVpk
    • Cct input impedance is not that high 1.2k ohms

Why isn't the on-chip charge-to-voltage converter sufficient to drive off-chip loads?

  • allows variable design flexibility

My Theory of Operation

  • 2 stage cascade common source FETs driving common emitter
  • With Re= 680, it can drive 1k AC coupled and 150 Ohms DC couple with some attenuation.
  • Zin 1,200 Ohms approx.
  • positive feedback R is called emitter degeneration with raises input impedance a bit, by bootstrap gain ratio at expense of input attenuation. 150:1200 ohm source: load
  • with xxx pF load this can also increase HF gain >1 making it unstable so the degeneration of input attenuation still causes high frequency peaking but with more gain margin., which may not be relevant

    If necessary anyway, why do they recommend a rather crude transistor buffer rather than some sort of precision op-amp, acting as a voltage follower?

Op Amps may have a big problem with up to 159MHz signal bandwidth (Table 6) with phase shift 1st , amplitude 2nd. - But possible but not suggested.

schematic

simulate this circuit – Schematic created using CircuitLab

The output swing might only <650mV not 780mV for monochrome and less on certain colors.

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