I have a relatively simple project (from the user point of view) in mind. I want to develop a very simple PCI Express (x1) card that users can put into their system and toggle some GPIO's from a GUI program (e.g. to turn on/off some stuff). The project might sound stupid as there are better alternatives but I have decided to do this to force myself get good at stuff. So I want to do PCB design and programming (GUI and eventually a driver).

So my question is, what are the minimum requirements to have such a simple extension card?

Is it possible to do this with a STM32 controller? or Will it need FGPAs or dedicated chips/ASIC? I can imagine there is some sort of handshaking going on when a card plugs in into a PCIE slot or at boot time...

And where can I gather more information about this?

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    \$\begingroup\$ To literally do this with the PCI Express itself you would require a bridge function, either as a chip or as a functional block in a suitable FPGA. If you could use a PCIe Mini-Card slot instead, you could more simply use the embedded USB bus with an MCU having a USB device interface as many STM32's do (unclear if mPCIe adapters implement the USB the way true slots do). There may also be possibilities to (ab)use the I2C-like SMBus if actually present on the host and if you can get the low level host software to let you... \$\endgroup\$ Commented Jul 29, 2019 at 14:54
  • \$\begingroup\$ Related electronics.stackexchange.com/questions/92871/… though the comments (especially that it seems often unimplemented) seem more applicable than the answer. \$\endgroup\$ Commented Jul 29, 2019 at 14:57
  • \$\begingroup\$ If you are going to put a card in a slot that has PCIe going to it, then a number of later FPGA devices have a hard PCIe endpoint available. \$\endgroup\$ Commented Jul 29, 2019 at 15:05

1 Answer 1


Look at any PCIe endpoint controller or IP (FPGA) for all the functionality you need without having to implement a driver.

For example the MCS9901CV-CC is a single lane multifunction PCI express to I/O controller. It supports two serial ports, one parallel port and six GPIO's.
This provides you with a simple parallel port interface, which is probably the simplest implementation you could get. You can also use the IEE-1284 prtocol to implement Byte, Nibble or extended I/O features.

There are lots of endpoint controllers with this sort of functionality, or IP if you want to implement in an FPGA (horrendously expensive for this simple functionality).

You DON'T need to start with PCIe bridge functionality as a standalone controller and it would be idiotic to put this functionality in place to get simple I/O functions such as you need.

I'd suggest you buy almost any simple PCIe single lane parallel port interface and begin your learning from whatever chip is onboard.

  • \$\begingroup\$ Your claim about a bridge being inappropriate is a fundamental misunderstanding of PCI & PCIe busses; essentially anything that meaningfully interfaces useful functionality to them is a "bridge" - look at the block diagram in the data sheet of the very part you yourself link to, and you'll see that its central function is in fact a PCIe bridge. \$\endgroup\$ Commented Jul 29, 2019 at 15:49
  • \$\begingroup\$ @ChrisStratton you are correct, but you can buy either an endpoint with the functionality all built in (as you point out) or you can buy a bridge function as a chip ….which forces you to design yet another PCI interface between that and the output you desire. Don't send the poor OP off down a path that results in more work where it is not required ...or at least be clear on what you are recommending. However I've revised the answer to be more specific. \$\endgroup\$ Commented Jul 29, 2019 at 16:14
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    \$\begingroup\$ @ChrisStratton I'd posit its you who doesn't understand the interface requirements. I've certainly worked on the development of PC's with ISA, PCI and PCIe professionally over the years. Your first comment is still out in left field, directing the OP to implement a PCIe bridge …..The OP only really needs a single chip solution at a couple of $ to complete the task. \$\endgroup\$ Commented Jul 29, 2019 at 17:01
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    \$\begingroup\$ @ChrisStratton Thanks for the down vote, I really do think your ego got in the way, you certainly don't like anyone who disagrees with you. Sad really. \$\endgroup\$ Commented Jul 29, 2019 at 17:37
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    \$\begingroup\$ @Jack Creasey - seems like the very thing the OP wanted, maybe even purchase-able as a pre-built card. I like it. Certainly cheaper than using an FPGA, even though doing that very thing keeps me in zinfandel and kitty litter... \$\endgroup\$ Commented Jul 29, 2019 at 23:04

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