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Hi, This is an extract from MT-021 from Analog Devices about SAR ADCs. In particular, it shows a circuit in which the Track(Sample) and Hold block of the SAR architecture AND the DAC of the SAR architecture are implemented as one.

My question is : The description/circuit is explaining about the operation of the DAC but if you read the highlighted sentance, it says "The comparator then makes the MSB bit decision". If this is operating as DAC, why do we need to make an MSB bit decision, shouldn't we already know the bits if it's a digital to analog converter?

https://www.analog.com/media/en/training-seminars/tutorials/MT-021.pdf

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If a DAC is used as part of a SAR ADC, then we don't already know the value of the MSB. The logic in the ADC makes an assumption about the value of the MSB, uses the DAC to create an analog voltage corresponding to that assumption, and then the comparator determines whether the actual input voltage is higher or lower than the DAC output. At that point, the SAR logic (of which the comparator is a part) makes the decision about whether the MSB should be high or low. The wording of the sentence you quote could be improved a bit, but in the context of SAR ADCs it is pretty obvious.

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  • \$\begingroup\$ Ah I see. So when they say "The comparator then makes the MSB decision", this is the next iteration (or first) of digital values as part of the SAR iterative process. \$\endgroup\$ – AlfroJang80 Sep 28 '19 at 16:51
  • \$\begingroup\$ Actually, may I ask, what's the point of the SAR register if the current digital code is being stored on the capacitors themselves? Or is it used to drive the switch inputs in the above circuit? \$\endgroup\$ – AlfroJang80 Sep 28 '19 at 17:54
  • \$\begingroup\$ Yes, the digital code is being used to control the switches. Eventually that code will be the output of the ADC so you want it to be in the form of normal logic signals that are easy to read. \$\endgroup\$ – Elliot Alderson Sep 28 '19 at 18:24

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