I am designing a custom board using HMC833LP6GE. I am taking schematic reference from the Evaluation module. There will be onboard DS-PIC MCU for controlling the PLL. The reference input can be fed external or through an on board crystal.
I am designing it on 4 layer card with following stackup.
TOP - SIGNAL
LAYER1 - GND
LAYER2 - PWR AND GND
BOTTOM - SIGNAL
I am unable to find the layout guidelines for designing.
I need some critical and important points while designing a PLL.
For example:- Loop filter is the heart of the PLL design. What care should i take with respect its placement? Can I place few components on top and few on bottom layer?