Difference between no input and a zero input in digital electronics

Question

I'm new to digital electronics and try to understand how logic gates works.

In books many times Zeroes​ and ones are referred as Low and High respectively, is Low and High used as an indication of lower input voltage and higher input voltage ?

And if Zero used as a low input voltage then isn't no input can also be considered as Zero by default?

or it depends on how the gates are implemented (e.g - AND gate can be implemented using diodes or transistors) and so in some cases no input by default is same as Zero input while in others they are different ?

I'll thankful if anyone can explain these things using an easy example !

Answer 1

Usually a Logic Low is a low voltage, normally near Ground/Zero volts, and a Logic High is a higher voltage near the positive supply voltage. There is a range of voltages between Low and High where the input state is undefined - we don't know whether the circuit will consider it as a High or Low.

If the input of a logic gate is not connected, that unconnected input may be considered as a Low or High depending on the design of the input or random floating charges. For bipolar TTL logic (74nn, 74LSnn) an unconnected will normally be considered as a High, but good practice is to connect it to a High voltage to be sure, if that is what we want.

CMOS logic has a very high input impedance and will float randomly if not connected, so unused inputs MUST be connected to a known logic level to ensure reliable operation.

Answer 2

is Low and High used as an indication of lower input voltage and higher input voltage ?

Yes, but some logic families also have current requirements. With TTL, for instance, a logic 0 is not only a low voltage but the driving stage must be able to sink 1.6 mA of current from the input.

And if Zero used as a low input voltage then isn't no input can also be considered as Zero by default?

No, because "no input" doesn't always define a voltage. An input that isn't connected to anything is called a "floating input". In the case of CMOS logic the voltage on such an input can be easily influenced by nearby electric fields. Therefore inputs to digital logic gates should always have a well-defined voltage.

This page describes a simple non-contact AC voltage detector using just a CD4060:

https://www.eleccircuit.com/non-contact-ac-detector-voltage-tester-using-cd4060/

The CLK pin of the CD4060 can be made to oscillate between a logic 0 and 1 just from the electromagnetic field radiated by a mains power cord.

A video demonstration: https://www.youtube.com/watch?v=SzM03wRh4FQ&t=1m20s

Answer 3

I would add that it is possible to design a digital device that can detect an open input vs. high input vs. low input, thus having a three-state input. This is done by alternately connecting the input to relatively high-resistance pull-up and pull-down resistors.

This does result in fairly low sampling rates as the device must let the input settle after changing the pull-up/down connections. however, I have seen devices that use this for configuration after reset where a configuration pin can have three possible states (external pull-up connection, external pull-down connected or floating).

Answer 4

Zero’s and one’s (low & high) are digital defined by analog values with a margin in between for transitions and noise.

No output is floating or called tri-state used on bidirectional busses.

However CMOS must never be designed with no input for many reasons and must be terminated low or high as required.

No input on TTL is hi, but for noise reasons ought to tied to a shared 10k pullup.

Answer 5

Philosophy

There is a lot of philosophy in this matter... and it can be revealed through generalized rather than specific explanations because the problem is purely electrical. Specific electronic implementations can only serve as examples that illustrate the general idea.

Implementation

Input circuit

Logic gates, like most electronic circuits, are voltage controlled. The problem is that, in many cases, we do not know what is inside the input. It can be "floating" (MOS gates) or connected by a "pull-down" element to ground (BJT gates) or to Vcc (TTL gates).

Output circuit

Voltage source. So, input sources (previous stages) should be controlled voltage sources producing voltage with two possible values - HIGH and ZERO. In both cases, the source output resistance has to be zero; so ZERO means both zero voltage and zero resistance. This will ensure that we apply the desired voltage to the gate input.

This requirement applies not only to digital but also to analog circuits. If it is not implemented in most cases, circuits simply will not work. For example, if in a RC differentiating or integrating circuit we apply zero input voltage by disconnecting and not by grounding, the capacitor will be constantly charged and the circuit will not work.

Complementary stage. Such a "true voltage source" is implemented by two complementary "pulling" elements - a "pull-down" element between the output and ground, and a "pull-up" element between the output and Vcc. They can be thought of as "ideal" switches connecting the output either to ground or Vcc... but actually they can not be "ideal". Let's see why.

The problem is that they should not be both on to avoid a short circuit. But they also should not be both off (even for a while) since the output will be "floating" during this time. Therefore, they must be oppositely varying (cross-fading) resistances to allow overlapping. So the input "voltage source" consists of two complementary (pull-down and pull-up) voltage-controlled "variable resistors" (transistors). I have considered this problem in my answer to a related question.

Open collector stage. If there is such an (e.g., pull-down) element inside the logic gate input, we can control it by only one (pull-up) element. This is the so-called sourcing "open collector" output. And v.v., if there is a pull-up element inside the logic gate input, we can control it only by a pull-down element. Now this is a sinking "open collector" output.

Conclusion

The general conclusion is that, to control a logic gate by voltage, there are always two complementary "pulling" elements. In the case of complementary output, both are inside the output of the previous logic gate. In the case of the "open collector" output, one of them is inside the previous output and the other is inside the input of the next logic gate.

Answer 6

Forget the idea that 0 is a low voltage and 1 is high. It's sometimes true but not always. 0 and 1 are abstract concepts that do not exist in the real (electrical) world. True and False would be better terms because it'd be less easy to confuse with voltages. The important thing is that digital circuits actively force their output to either True or False, depending on their inputs.

Now what happens if it does neither? What if the output is effectively disconnected and left undriven? Electrically we'd say it's "floating" (if it's voltage that we care about). Logically we call it Z. This means that some other circuit can drive it.

Consider a differential current mode circuit. This is used in things like HDMI. Two wires are used to send current, and they always carry current in opposite directions. You can think of it as a loop... current flowing clockwise is 0, counter clockwise is 1. What is no current at all is flowing? This can be used to signal something else in a protocol like this (perhaps the cable has been pulled). It's not 0 or 1, and neither had anything to do with voltage.