How do I use T-Flip Flops to derive circuits - given the clock signal speed?

Question

I've been trying to do my EE homework for several hours and cannot figure out how to do this stuff.. I've read through the chapter multiple times, searched YouTube and Google, and nothing seems to help at all. So I thought I'd give this a shot.

I'm given a problem that tells me the starting clock = 100MHz. I'm asked to derive a circuit using T-Flip Flops to generate 50MHz and 25MHz signals.. and to make a timing diagram for all 3 signals.

I can't stand EE, but it's a requirement for my major unfortunately :/

If anyone can help me out, I'd greatly appreciate it. Thanks!

Answer 1

A T-Flip-Flop (TFF) is basically a clock divide by two. Feed one a 100 MHz clock and you get out a 50 MHz clock. Feed that 50 MHz clock into a TFF and you get out a 25 MHz clock.

Answer 2

A synchronous design:

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