I've been trying to do my EE homework for several hours and cannot figure out how to do this stuff.. I've read through the chapter multiple times, searched YouTube and Google, and nothing seems to help at all. So I thought I'd give this a shot.

I'm given a problem that tells me the starting clock = 100MHz. I'm asked to derive a circuit using T-Flip Flops to generate 50MHz and 25MHz signals.. and to make a timing diagram for all 3 signals.

I can't stand EE, but it's a requirement for my major unfortunately :/

If anyone can help me out, I'd greatly appreciate it. Thanks!

  • \$\begingroup\$ We don't mind giving a helping hand with homework, and good for you for telling us its homework! That said, try to map out your understanding of the problem for us, so we can try to figure out what concepts you're having trouble with \$\endgroup\$ Apr 7 '13 at 22:49

A T-Flip-Flop (TFF) is basically a clock divide by two. Feed one a 100 MHz clock and you get out a 50 MHz clock. Feed that 50 MHz clock into a TFF and you get out a 25 MHz clock.

  • \$\begingroup\$ So is the 100 MHz clock fed into the clock of the FF? \$\endgroup\$
    – Justin
    Apr 7 '13 at 21:57
  • \$\begingroup\$ Yes, the 100 MHz is fed into the clock input of the TFF. The "T Input", if you have one, is set so the output always toggles on a clock edge. Same with the second TFF, but you feed it with the output of the first TFF> \$\endgroup\$
    – user3624
    Apr 7 '13 at 23:24

A synchronous design:


simulate this circuit – Schematic created using CircuitLab

  • \$\begingroup\$ That seems to differ from what @David Kessner said \$\endgroup\$
    – Justin
    Apr 7 '13 at 22:27
  • \$\begingroup\$ and what is wrong with that? there's many different ways of doing it, my solution is but one. \$\endgroup\$ Apr 7 '13 at 22:31
  • \$\begingroup\$ Ok thanks. So is the 100MHz clock going into the clock for both FF? \$\endgroup\$
    – Justin
    Apr 7 '13 at 23:15
  • \$\begingroup\$ Figuring out how the output of this circuit might not be exactly what you normally think of when you think of a clock signal is left as an exercise for the reader. \$\endgroup\$
    – The Photon
    Apr 8 '13 at 1:03

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