Difference between latches and flip-flops in datasheet

Question

At university and several online searches (Difference between latch and flip-flop) I have been taught that the difference between a latch and a flip-flop is that the latch is level triggered while the flip-flop is edge triggered.

However, when examining the datasheet of the 74HC595 (8-bit shift register with output latches) I have read that they name the registers forming the shift register flip-flops and the registers forming the output register latches (SHCP is Shift Clock and STCP is Storage Clock):

However, when observing the function table, both are triggered by a rising edge:

Even the timing diagram portrays the latch as edge-triggered:

What is the difference between a latch and a flip-flop then?

Answer 1

When talking about the actual low level component, “flip flop” is generally used when referring to an edge-triggered entity and “latch” for a level-triggered one.

All the components in the HC595 are edge-triggered flip flops (as you correctly inferred from the truth table), so it looks like in the datasheet they are using the word “latch” in the lower components to describe the function, i.e. whereas the top flops are implementing a shift register the bottom ones are “latching” and holding the 8-bit value from the shifter.

Answer 2

The terms "flip-flop" and "latch" are not universally standardized. While most writers use "flip-flop" for edge-triggered devices and "latch" for level-sensitive devices, some writers use the same term for both or reverse their meanings.

This has been asked and answered several times, try searching through the old questions on this site.

Answer 3

You will find some inaccurate wording in some writings.

The term "flip-flop" can have two meanings depending upon context:

1. It can mean an edge-triggered register that store the value of the input signal on the rising edge (most common these days) or negative edge (less common). This can also be referred to as a d-type register or flip-flop.

2. A register that changes to the opposite state on the clock edge. This is a less common meaning in modern usage.

The term "Latch" can also have multiple meanings.

1. It usually means a register that becomes "transparent" when the clock is in a certain state (usually high) and then freezes that state when the clock goes to the opposite state. Such a device is the [74HC573][1]. This is often referred to as being level triggered.

2. It can be used as meaning a storage register that is edge-triggered as with a D type register, this is the meaning used in the 74HC595 that the OP posted.

This device has output latches that are transparent [MAX6971][2]

Because of the different meanings, you may have to read the datasheet carefully to determine which one is being used in any particular context. [1]: https://assets.nexperia.com/documents/data-sheet/74HC_HCT573.pdf [2]: https://datasheets.maximintegrated.com/en/ds/MAX6971.pdf