How can I draw the timing diagram for the circuit below? What are the steps?
I can't understand even how to read it. What do I do with the numbers below each logical port, eg: 5ns , 10ns etc)?
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2\$\begingroup\$ An example might help. \$\endgroup\$– Andy akaCommented Jan 9, 2015 at 12:11
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\$\begingroup\$ I have added a exapmle \$\endgroup\$– saja ibraCommented Jan 9, 2015 at 12:32
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\$\begingroup\$ A good start is to take a transition of just one input that changes the output value, and analyze how the change propagates in the circuit. \$\endgroup\$– clabacchioCommented Jan 9, 2015 at 12:45
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2 Answers
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Think of the timing diagram as looking at the face of an oscilloscope. There are horizontal lines representing the voltage levels and signals, then there are vertical lines representing time. In this case the best time interval would be 5nS (per each vertical line) since this is the shortest delay time shown and 10nS is divisible by 5nS. To show all 3 inputs and the outputs you would want a 4 channel scope, which could be shown by using 4 horizontal lines.
As in the other responses, to show all possible states you need to show all possible levels of all the inputs, in this case logic levels have 2 states and you have 3 inputs. So the combination of 2 states by 3 inputs gives 2^3 or 8 state changes. The total time is 10nS + 5nS so the horizontal time needs to be at least 8 x 15, 120nS.
The 4 horizontal lines can be labeled A, B, C, and F. Again as above, start with all the horizontal lines at 0v (low). In this case the F output is also low at the start because that is the logic of the circuit.
Next moving from left to right show only the A line rising to logic high, leaving B and C low, now you calculate the output F, but before showing the change in output F you must add up the delays, in this case it is 15nS. So 3 vertical lines passed the initial change in A the F line will change to high.
Continue the lines as A, B, and C change from 000, 100, 010, 110, 001, 101, 011, 111, and back to 000. Just remember that the change in F is always delayed by the total delays of the gates that the changing signal passes through, (so the total vertical lines will really need to have 3 extra at the very end to show the final delay in output F).
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\$\begingroup\$ If you need to show the W1 signal you could use a total of 5 horizontal lines. \$\endgroup\$– NeddCommented Jan 9, 2015 at 15:59
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\$\begingroup\$ Note that when only the C input changes the total delay is only 5nS. In cases where C and (A or B) changed the delayed change in F would be after 5nS then again after 10nS more. \$\endgroup\$– NeddCommented Jan 9, 2015 at 16:07
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Ok I think a good way is to go step by step through it.
- What are the possible inputs?
- What is the expected output for each sub element?
- I suspect the timings below the elements are the delay. So before you see w1 changing to an input change it takes 10ns.
So start drawing A=0, B=0, C=0 and the result. Than set A="1", B="0", C="0" and then when you come to for example the case A="1" B="1" C="0" draw that w1 changes to this inputs after 10ns. and than the change of F 5ns after that.
You go one with this strategy for every case. And every case has to be holded for at least 15ns!
