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I have been using a Spartan 6 where the TX/RX pins are multiplexed with the IO pins, I can't find any dedicated TX/RX pins on the Xilinx Zynq Soc, is it a Xilinx thing to multiplex TX/RX with IO pins? I not able to find any thing in the data sheet.

EDIT:

Its using the Arm Cortex A9 processor, I presume the TX/RX pins would be the same as on the a9? would I be correct in thinking so?

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  • \$\begingroup\$ Talking about "the TX/RX pins" of a Spartan-6 is kind of odd. No such pins exist in the part. \$\endgroup\$
    – user39382
    Commented Apr 5, 2016 at 18:24
  • \$\begingroup\$ They do, 2 I/O pins are TX/RX. as well as I/O. \$\endgroup\$
    – Alex
    Commented Apr 6, 2016 at 8:20

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I am assuming you are referring to the TX/RX signals of a UART.

You'll find plenty of information in the SoC Technical Manual, specially in chapter 19. The UART signals can be assigned to different pins which you can see in the table 19-4: UART MIO Pins and EMIO Signal, page 604, or otherwise in the MIO-at-a-Glance Table in page 53.

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