I created an FPGA system on ModelSim (a simple algorithm that calculate an equation and save on-chip), synthesized with Quartus Prime, then downloaded to my DE1-SOC.
My intention is to compare my results with an implementation made in a paper. In the paper they make almost the same calculation than me, and they report speeds around 15 "ms" mili-seconds. They don't provide frecuency speed about their system but about the NIOS-II processor itself which is 75 Ghz.
In my system I'm not using NIOS-II, but rather calling altera IP's for Mul,Div etc.
Now, I don't know exactly how to read my own speed values. Here in this forum I was told that I should look at the compilation report of Quartus Prime, exactly what segment of the compilation report should I look at?
Looking at the wave in the modelsim, tracking when it finish the calculation it says it is completed on terms of "PS" Pico-seconds and the conversion to "ms" I'd have less than 1 milisecond. So it means my system is faster than the aforementioned paper?
Exactly which department should I see in the compilation report of modelsim to know the Speed of my system aka calculation time.
This values come from softwares, are these values exactly the same that what is physically happening in the board itself?