I am using Vivado (2017.4) and have been trying to experiment with the Clocking Wizard IP. I understand how to create a new IP but am not sure what to do with the HDL file it generates. I've looked at a lot of tutorials and they all seem to have different methods for incorporating the new clock speed into their project.
Does anyone know of a standard way to use the code generated by the Clocking Wizard in your project? I'm familiar with both Verilog and VHDL so any advice would be helpful!