For an application I need to FM modulate a signal with a 10 MHz bandwidth. Due to constraints I have no control over, I have to do it in an analog way (so I can't just digitize the signal, IQ modulate, etc). The center frequency of my modulator is not of too great importance since I will have to use second converter stages to shift it up to the target band anyways.
Since no manufacturers (of which I can easily acquire ICs in low volume) seem to make FM modulators that support that bandwidth, I am looking at building my own, based on a PLL.
For the modulator, this translates to injecting the to-be-modulated signal into the error loop, after the low-pass filter of the PFD, and thus modulate the VCO. For the demodulator, we input the received signal as reference, and given the PLL loop, the PFD will try and output the wanted signal as error to the VCO (but the filter prevents it from reaching the VCO).
In the modulator case, we require that the VCO control bandwidth is high enough to actually modulate. In the demodulator, we require that the PFD has sufficient output bandwidth to keep up with this 10 MHz modulation. However, in single-chip PLLs, neither of these parameters are often specified (and I don't think they have enough bandwidth for my application, though I will have to verify this with measurements).
For this reason I am now also looking at using standalone blocks to build a fast enough PLL. Minicircuits have various oscillators with high control-voltage-bandwidth, so that just leaves me with the PFD. There are a few very fast ones on the market, but none of them give a bandwidth as they operate in a more digital manner (pulsing currents to go up or down in frequency) and list rise and fall times. For example, the ON Semi MCH12140 datasheet lists a worst-case 20-80% rise/fall time of 350 ps. How do I relate this to the bandwidth of FM demodulation I can perform using this device?