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Suppose we have an NMOS transistor with VGS> VT. When VDS is 0, the channel depth is uniform along the transistor. However, when we increase VDS, the channel becames deeper near the source and shallower near the drain. I don't understand why these happens, that voltage should atract electrons towards the drain not the other way. What am I thinking the wrong way?

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  • \$\begingroup\$ If you need any other help, just let me know :) . \$\endgroup\$ – Daniel Tork May 27 at 9:37
  • \$\begingroup\$ Thank you very much :) \$\endgroup\$ – Seven May 27 at 13:13
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Which is the most positive terminal? Since we are dealing with an N-MOSFET, the drain must be the answer. Thus, the electron density (\$\frac{electron}{m^3}\$) will be high at the drain and will progressively diminish as one approaches the source (as one goes from drain to source). The lowest carrier density should be at the source. Yet, there seem to be more electrons at the source than at the drain. Actually, the electrons are piling up at the drain terminal (Lecture22 : MOS transistor Processing [Internet]. Available from: NPTEL [Accessed 26 May 2019]). Thus, it looks like they moved towards the source, but they haven't. That is why it seems to be "empty" there. The electrons from the source terminal are too far to be affected.

Imagine many ferromagnetic balls laid on a table, distributed uniformly. Now, take a magnet and place it at one end of the table. What will happen? They will gather on the magnet's end, piling up there. There will be others which will pile more and more as you get closer to the magnet.

The pinch-off phenomenon is linked to the saturation mode when \$V_{DS}>V_{GS}-V_{TH}\$ and it is behind the ongoing slight increase of \$I_{DS}\$ as \$V_{DS}\$ still increases.

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