PCB routing: isolate through-hole pins to force routing through decoupling capacitors?

Question

I'm a beginner in PCB layout, and have a question about decoupling capacitor routing in through-hole designs. I know that in SMT design, best practice is to place the capacitors as close as possible to the supply pin and route power from its source (supply trace or plane) first through the capacitor and then to the pin, kind of like this:

In a through-hole design, we might start like this, before pouring the power and ground planes (example in EAGLE):

Now, when we pour the power plane, we get this by default:

Note that since both the capacitor pin and the IC's supply pin are on the +3.3V net, the design tool (EAGLE) has connected both pins to the plane. My questions are:

• Does this really matter? I believe standard best practice is to force the connection to the supply to go through the capacitor before it reaches the pin.

• If it really does matter - and I think it does - is there a way in typical PCB software (EAGLE in my case) to prevent it from connecting the IC's supply pin to the plane, so that the plane only connects to the capacitor pin, and thence via the trace to the IC pin? I know I could manually draw a keepout polygon to block the polygon pour in the area around the pin, but this would be a very tedious process to do by hand for every pin. My thinking is that if this is really electrically important, most PCB software should offer a way to deal with this.

• Do the answers to #1 and #2 also apply to the GND pins? In this example, would it be best to (a) connect both capacitor's and IC's GND pins to the plane and not bother with a trace, or (b) trace from the IC's to capacitor's GND pin, and connect the capacitor GND pin to the GND plane?

Answer 1

The truth of the matter is that it doesn't really matter if the current "hits" the capacitor before the pin of the IC or not. This has long been debated and recent studies have suggested that simply having the capacitor placed close to the IC is sufficient. Dave Jones of the EEVBlog did a video to help illustrate this, but he is most certainly not the only one. I believe Rick Hartley, one of the world's leading experts in high-speed board design, has also proven that it does not really matter the order in which the current "hits" the pins. In most cases, it is actually preferred to have the capacitor connected to the IC pin through a plane, as that is lower inductance than a discrete trace.

Here is Dave Jones' video: https://www.youtube.com/watch?v=1xicZF9glH0

Answer 2

The only thing that matters is that you keep the inductance of your track arrangement low. Inductance depends on the area between the tracks of one closed loop circuit (and regardless what else is placed inside).

So you keep it low by routing pairs this way ][ and not this way [ ].

Answer 3

A long while back I read "PCB EMC Design Techniques" by Mark Montrose, and I think it's still a good read.

At the heart the current loop impedance is important, and that includes the inductance induced by the traces that are created specifically to guarantee that the capacitor's charge is mainly used for the IC it is decoupling. Those traces can actually decrease performance. Mark Montrose writes "Maximizing the physical width of the connection from the capacitor to planes minimizes total loop inductance". Vias add inductance as well.

So in the general case, for high frequency decoupling purposes, I'ld prefer a plane connection rather than dedicated traces. The current will "find" the shortest loop anyway.

However, there is one case where I added a dedicated trace for decoupling, and it was actually a "low frequency" issue.

I had a circuit using an SDCard used to store the results of several measurements. As far as I remember, tthe SDCard was disturbing the circuit when it was switched on caused disturbances on the measurements where we were looking for very small changes in the values.

So I ended up adding a bead, and a nettie to be able to route separate VCC and GND traces up to the SDCard directly from the LDO's output.

You can see the adjacent traces on the PCB, the GND trace running up to C33 and the VCC trace up to L3.

The LDO is on the other side of the board in between the two holes on the left of "SHDN" in the white square. It's from that area that the traces lead up to the SDCard.

IHMO this was a low frequency "bulk" capacitor issue rather than a HF decoupling issue.

Moating

This technique essentially consists in creating areas with a local ground plane. This is something that our design group used to do. More for historical reasons than any proof that I have seen. Typically, the oscillator circuit would have a local ground plane separated from the rest of the circuit except for the small area ("bridge") where all signals pass (in particular power, gnd and clock signal).

This discipline is helpful in helping avoid tracing any critical signal lines below or near the clock lines, but it's not sufficient. We ran into major disorders when the analog green video line was next to the clock line for about 10 centimeters. Everything worked fine until we went asynchronous at which point the crosstalk came in.

Increased current loop to avoid malicious currents

I've also experienced a practical case where we had a daughter board, with plenty of decoupling capacitors on it, but only a few undistributed GND connections to the main board. The return current resulting from the output changes did not follow the GND path, but used the signal lines instead, resulting in 2Vpk-pk changes on those. 0's became 1's and vice-versa at wrong times.
I improved that by recreating a GND plane connection with the main board, before resolving the issue by replacing the clock connection with a twisted wire.
That increased the current loop for the return current, so that the clock signal stayed clean. The rest didn't matter anymore as all outputs change after the clean(ed) clock and stabilize before the next clock cycle. Our prototypes were fixed just by adding this twisted wire in place of the clock connection of the connector.

There much more to tell, but well, that's why there is at least one book, several courses, etc. ;-), and practice!