Below is a simple Class A amplifier. Why does it stop amplifying at very high frequencies? Why does it distort so much?
Here is the output by frequency:
It rises, as predicted, but only to about 2 MHz or so, then it begins dropping. Why?
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3\$\begingroup\$ You should not expect a MOSFET designed for switching applications to be used successfully above a few MHz in linear applications. You should also sweep the AC with much more finesse and use more points in the AC analysis. \$\endgroup\$– Andy akaCommented May 31 at 14:19
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\$\begingroup\$ @Andyaka IRF530 and relatives have been used successfully across the SW band. The main problem here is the lack of impedance matching: a lower drain load impedance is required to achieve much bandwidth. Tuning and neutralization would be further considerations. \$\endgroup\$– Tim WilliamsCommented May 31 at 23:12
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\$\begingroup\$ Please elaborate on the distortion part. How much output voltage do you expect with 10 V V1? \$\endgroup\$– greybeardCommented Jun 1 at 4:47
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2 Answers
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Below is a simple Class A amplifier. Why does it stop amplifying at very high frequencies? Why does it distort so much?
The Miller effect and the internal parasitics of the MOSFET, like GS, DS capacity and the source inductor (7.5nH) contribute to a decrease in gain with increasing frequency. Especially in single band power amplifiers, most of the parasitics are easily absorbed into LC matching networks which makes MOSFETs, designed for low frequency switching operation, also usable at higher frequencies.
Many CB radios this days have one or two of this budget, switching MOSFET(s) in the final amplifier stage. Below is an example for a 28MHz 7W class-AB amplifier with an IRF530N:
The input impedance needs to be made small to make the MOSFET work at 28MHz . The total input capacity of the MOSFET is absorbed into a low impedance LCL lowpass filter. The MOSFET DS-capacity is made part of an lowpass LC-network that matches the drain to 50 Ohm. Power gain is only 12dB and chosen quiescent current is 0.4A which affects overall efficiency. Third order intermodulation products are -20dBc (or 26dB below PEP). For improved linearity consider a higher supply voltage.
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\$\begingroup\$ Thanks. Can you explain "most of the parasitics are easily absorbed into LC matching networks which makes MOSFETs" further? I don't understand what it means to absorb something into an LC network. (Parasitics are of course inherent to physical MOSFETs - what do you mean to absorb them?) \$\endgroup\$ Commented Jun 3 at 1:18
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\$\begingroup\$ @SRobertJames "Absorbing" means using the unwanted but inherent input and output capacitance of the MOSFET to your advantage, in this case as part of input and output LC matching networks. As an example, the amplifier output is matched by a narrowband PI-lowpass filter that transforms the 50 Ohm antenna impedance down to a ~12 Ohm load for the transistor. Probably not very obvious but the output capacitance of the MOSFET is made part of (absorbed into) the PI-filter by decreasing the initially calculated input capacitance value of the matching network by the correct amount. \$\endgroup\$– RaonokeCommented Jun 3 at 15:15
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Mainly because of the Miller effect.
Within the MOSFET symbol on your schematic, there is an ideal MOSFET surrounded by other components, known as parasitics (or non-idealities) that cause the behaviour of a real-world device to deviate from the ideal. Here is one representation of such a model:
Link for above image:
https://www.highfrequencyelectronics.com/Archives/Aug13/1308_HFE_spice.pdf
The Miller effect relates to the components marked as Cgd, Rg, & Lg in the model above.
The effect of these components is to divert current away from the ideal gate & into the drain circuit, and cause a difference between the gate-source voltage that is visible at the terminals of the real-world device, and the gate-source voltage on the ideal MOSFET. In regards to the Miller effect, this difference always causes the real-world device to have worse (slower) speed and lower bandwidth than the ideal device.
You won't be able to see the gate voltage of the ideal MOSFET because it is inaccessible. However, if you examine the model of the MOSFET you should be able to identify the parameters that model these parasitic components. If you want to see the effect of these parasitics, change the MOSFET model to eliminate them and then re-instate them as external components. This gives you access to the internal nodes within the model, and should reveal the effect of these parasitics, including the Miller effect.
Here is a good resource for understanding the MOSFET model used by LTspice:
http://www.simonbramble.co.uk/lt_spice/ltspice_lt_spice_tutorial_6.htm
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you will see it reduceslooks like an idealised voltage source to me, and no intervening impedances? (I'd not be surprised to see 20 V. 80 V begs explanation, too.) \$\endgroup\$ Commented May 31 at 16:14 -
1\$\begingroup\$ @greybeard The MOSFET has an internal gate resistance. \$\endgroup\$ Commented May 31 at 18:40
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\$\begingroup\$ @greybeard Greybeard is correct, the last part of my answer is incorrect. I will edit it, thanks. \$\endgroup\$ Commented May 31 at 22:50
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1\$\begingroup\$ I wouldn't say mainly; it's jointly Miller and Coss. Both are relevant to a practical amplifier design, in varying proportions depending on topology and port impedance. \$\endgroup\$ Commented May 31 at 23:13