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Results tagged with xilinx
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user 2597
A popular manufacturer of FPGAs (Field Programmable Gate Arrays) and CPLDs (Complex Programmable Logic Devices).
1
vote
1
answer
2k
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System Generator: How to generate a .bit file?
I am using System Generator and I would like to generate a .bit file in order to load into my FPGA. Does anyone know how to generate a .bit file with SG?
Thank you.
- 965
2
votes
Accepted
System Generator: How to generate a .bit file?
Well, I found the how-to.
Just click on the System Generator token block on the simulink scheme and configure its parameters. In the parameter compilation it´s neccesary to select 'bitstream'.
- 965
1
vote
2
answers
466
views
System Generator: How to know if my FPGA could have enough resources to perform a design
I am doing a design using System Generator, and I have some doubts if my design could be performed in a Virtex 4 FPGA.
Does anyone know what can I do to check this?
- 965
1
vote
2
answers
427
views
System Generator: How to make a channel selector?
implement:
if sel == 1 {
channel_A = in;
float_pin(channel_B); // make high impedance
}
if sel == 0 {
channel_B = in;
float_pin(channel_B); // make high impedance
}
How do I do this with Xilinx …
- 965
4
votes
4
answers
8k
views
Xilinx ISE - VHDL: Code template to make a ROM
I am looking for a implementation of ROM using VHDL code.
I´m looking for a piece of code to make this easy example in order to make a generalization afterwards.
I want to put in the ROM these values …
- 965
2
votes
1
answer
3k
views
What is the file extension of the file that is loaded in a Xilinx FPGA?
I wonder what is the file extension that described the functionality of my design and is the file that is loaded in a Virtex 4 FPGA to get the behavior of my VHDL design.
Thank you.
- 965
2
votes
3
answers
4k
views
DSPs: Can I perform floating point division in a Xilinx DSP48?
One is using the Xilinx DSP48 block.
Does anyone knows if is posible to make a division implementation through a DSP48 xilinx block?
Thank you for your help. …
- 965
3
votes
3
answers
1k
views
Microcontrollers: Can I perform floating point operations in a Picoblaze controller?
I wonder if I could perform floating point operations in a Picoblaze controller? Thank you to all posible answers with direct references to documentation or articles.
- 965
0
votes
1
answer
464
views
System Generator: a block to change sign of a floating point
I´m working with floating point numbers in System Generator. I need to perform this arithmetic operation y = x*(-1) . I think it could be done by using the mult block, but I don´t like this way becaus …
- 965
0
votes
3
answers
2k
views
SFF SDR: How to implement a simply program in the FPGA
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
---- Uncomment the following library declaration if instantiating
---- any Xilinx primitives in …
- 965
5
votes
2
answers
3k
views
Average Fanout of Non-Clock Nets
Xilinx ISE Design Suite gives information about the resources that a particular design uses. …
- 965
-2
votes
1
answer
495
views
Choosing a tool for development: System Generator vs Xilinx ISE
Does anyone know what is the fastest development tool Xilinx System Generator or Xilinx ISE.
Thank you. …
- 965
1
vote
1
answer
1k
views
System Generator: How to make an implementation a mathematical function through a ROM
I want to put in a ROM a vector of values I have in the workspace. Does anyone know how to do it?
Thank you to all possible references, articles or comments.
- 965
2
votes
2
answers
223
views
System Generator: a block similar to a three state logic
does anyone what is the xilinx block for getting a three state logic? …
- 965
1
vote
1
answer
2k
views
System Generator: How to configure the CORDIC divider block?
He all, I was wondering how should be the parameters fo the CORDIC divider block in order to get proper results.
In this example I´m trying to get 0.1/0.2 = 0.5 but I don´t get it and I don´t know why …
- 965