I'm trying to design a 59 second countdown on Quartus Prime, using a 4-bit JK stage for the second units and a 3-bit JK stage for the second tens. However, I've run into what I feel is a simple problem but can't quite find the right logic to solve it.
As I've just come to realize, Flip-Flops have a default value of 0, which creates a problem for my count visualizer in a 7-segment display. I realize I have to use the PRN input to preset the initial value (9 and five, respectively), but I don't know how to disable this line once the count actually begins (first CLK rising edge).
Now, I'm sure there's probably easier ways to do this, but I am in an introductory course, this is my first time working with this stuff.
I've attached an image of the Schematic I'm working on to get a better idea of what's happening.
ETA: The 'frec_div' block (as the name suggests) is a simple code where I divide the Cyclone IV's frequency (50MHz) to 1 Hz.