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What happens to Voh and Ioh when the number of loads connected to the output of this logic gate increases?

My interpretation is: the increase in number of loads decreases the equivalent impedance, which causes the current Ioh to increase. Is this view correct? But I can't visualize what happens to Voh.

schematic

simulate this circuit – Schematic created using CircuitLab

enter image description here

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Inside the inverter there is a switch, this switch flips between Voh and Vol. Now, this switch has resistance (like pretty much everything) and so when you pull more current, the switch isn't able to pull the output as close to Vcc or GND as it would have been able to other wise. Basically, Voh drops and Vol rises (assuming equal loads in both directions)

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The voltage divider created by the totem pole output and the loads causes VOH to drop below VDD. If this voltage drops below VIH before the current reaches IOH then the digital circuit may glitch. If IOH is reached before VIH then the totem pole output may be damaged. Neither is a good outcome which is why one or more buffers may be needed if the load count is excessive.

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