- How is it possible that the Signal Output will have the same frequencies as the Reference Signal?
\$f_1\$, Frequency of the Reference Signal;\$f_2\$, Frequency of the VCO.
- Let's assume that \$f_1>f_2\$, so the phase detector will create a positive voltage \$V_1\$
- At this point \$V_1\$ will ensure that the VCO will increase his frequency of oscillation.
- At this point \$f_1=f_2\$, and this will make \$V_1=0\$, but if \$V_1=0\$, then \$f_2\$ will drop.
- If \$f_2\$ drops, \$f_1\$ will become again \$>f_2\$, and \$V_1\$ will be positive.
In according to this reasoning this circuit will create an oscillation, where am I wrong, (Since this circuit will create a very stable Signal Output with the same frequency of the Reference)?
- Why this circuit need an error in the phase for create a lock and so Phase1 must be not equal to Phase2?
- What will happen if \$f_2>f_1\$, will the Phase Detector create a Negative Voltage?