Questions tagged [multi-master]
The multi-master tag has no usage guidance.
14 questions
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STM32 Multimaster / Multislave RS485 implementation with manual flow controll
I'm recently going crazy on a RS485 Multi Master implementation on STM32 and I can't figure out, what's my problem... After multiple days of figuring out, what's the issue, I turn to you and hope ...
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I2C: Regulator returns different values upstream and downstream of switch
I'm trying to use an Aardvark I2C controller over the SMBUS_TEST1 header on an ASRock IMB-A8000 motherboard to read voltage and current from an RT3674AE regulator. I don't have a schematic for the ...
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I2C: How much may SCL frequencies of several masters in a multi master bus differ?
And what will / may happen if the two master SCL frequencies are very different = so much that even when starting at the same SCL falling edge they will be opposite in phase before 9 SCL pulses are ...
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Multi-master Bus Systems, Arbitration and Synchronization
I am slightly confused in the multi master system of Atmega328p. I have understood that first the clock is synchronized by taking the logic and gate of all. Then the data is synchronized and one ...
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How to chain I²C level shifters?
How can I chain two level shifters in a multi-master I²C system?
The following picture shows the I²C bus. Due to low-voltage to the masters, the A side (low-voltage side) of the level-shifter needs to ...
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I2C Multimaster Operation
This is with reference to this question and this App Note
In the App note, Page 4, it discusses about the steps for multimaster which I have mentioned it below :
" The following describes the ...
user220456
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Can RS485 be considered a multi-master bus?
There are some electrical specifications specifically designed for multi-master protocols such as CAN, I2C, 1-Wire, etc. which are classified under CSMA/CD networks.
However, RS485 has a push pull ...
- 1,446
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i2c multi master "undefined conditions"
I have read the I2C bus specification and don't quite understand the limitations of a multi master I2C bus mentioned on page 10:
https://www.nxp.com/docs/en/user-guide/UM10204.pdf
One the one hand ...
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Bus mastering VS Bus arbitration [closed]
If there are multiple bus masters possible in a bus architecture then is it certain that 'Bus arbitration' will take place before a master gets hold of the bus control or is it possible that bus ...
- 1,489
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Multiple slaves with identical addresses on multi-master I2C bus [duplicate]
I'm planning a hardware design, where I have a main board and multiple peripheral boards. On each of these boards is a microcontroller with I2C, which is the communication bus for the boards. The same ...
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Does the STOP condition have any meaning on a single master I2C system?
I'm currently working on rewriting some of the code on my I2C driver, and I'm trying to figure out the exact purpose of the STOP condition.
I believe that on a multi-master system, once a START ...
- 438
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I2C SoC explicitly not multimaster
While reading the guide of a chip I'm about to take in use (Intel Edison), I noticed the SoC is specifically not supporting multi-master.
The SoC is always I2C master, it does not support ...
- 1,305
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How does multimaster I2C work and its significance?
I am fine with I2C basic communication and implementation?
Need info on Multimaster mode of I2C
How does multi master I2C work? Advantages over I2C single Master?
In what circumstances this multi ...
srujan
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On multi master i2c bus how to determine which device is the master of the bus?
On a multimaster i2c bus, how to determine which device started the transfer?
update (from comments made below by the O.P.) :
I am trying to make sense of http://www.i2c-bus.org/serial-resistances-...
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