Questions tagged [virtuoso]

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Allowed amount of input wreal data type at verilog-ams

I'm a newbie at using Verilog-ams and also I want to write a module for flash ADC for a specific application. I need to confine my voltages reference so I wrote this Verilog-ams code for testing input ...
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I want to Implement this active inductor design in my circuit

I'm trying to use the active inductor in here instead of the inductor in my class e power amplifier, however I'm having difficulties in getting the required values for the parameters in here Cds, Cgs, ...
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What is the minima rule for a Metal 1 layer for the 2 contacts on a poly shown on the figure? I'm using 0.18um library

Contact on a poly using 0.06 spacing for the metal 1 layer
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Figure of Merit for sizing P-MOS and N-MOS in Inverter circuit

I am trying to design a basic circuit block of inverter (Analog circuit) in Cadence Virtuoso schematic in 22nm technology. It will be used for non-overlapping clock generator. I need to size the P-MOS ...
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Setting multi-fingers in MOSFET in series configuration in Cadence Virtuoso schematic

I am trying to figure out to set multi-fingers (nf = 3) for MOSFET (both P-MOS and N-MOS.) I know I can increase the length directly. As connecting MOSFETs in series increases length, can I somehow ...
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How to add NCSU FreePDK45 to Cadence Virtuoso Library?

I'm looking for a comprehensive guide on how to add FreePDK45 to Cadence Virtuoso Library (2015 version). The installation guides included are not clear for first timers, and other resources available ...
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Transmission gate conducting in OFF state

Here is a part of my circuit that I am trying to simulate in cadence virtuoso. It has two transmission gates, the one in path of charging the capacitor is on and other one is OFF. Supply voltage is ...
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6T SRAM cell write operation not working as expected in virtuoso

I am trying to play around a 6T SRAM cell by simulating it's write operation in Cadence Virtuoso. The NMOS and PMOS specifications are 120/45 nm and 310/45 nm. The Bit select is kept at constant 1 and ...
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virtuoso ERROR (WIA 1175) "Cannot plot waveforms … no waveform data is available"

I am new to Cadence Virtuoso and trying to plot the characteristics of very simple voltage divider. I have included model files from gpdk45 and when I try to simulate, it says: Cannot plot waveform ...
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How to display the value of a parameter in a Verilog-A script using Cadence Virtuoso?

I ran a Verilog-A script in Cadence Virtuoso. I used the function $display() to print the value of some of the parameters in the script. However, I cannot find the values displayed on the CIW window. ...
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