Logisim Help - Using Custom D Flip Flop

Question

I am trying to create a D Flip Flop to use in a bidirectional 4-bit shift register, using Logisim. However, when using my D flip flop the shift register acts just as a normal register setting the bit for all 4 D flip-flops outputs instead of one by one. It works properly when using the D flip-flop provided by Logisim but I am wondering how to achieve this using my own D Flip-Flop.

This is the design of my D Flip Flop

And this is the shift register (with the boxes representing the D Flip Flop)

Any help would be greatly appreciated

Answer 1

D flip-flop provided by Logisim which you used for simulation was a positive edge-triggered D Flip-Flop. While what you have designed is a level-sensitive D latch.

You have to cascade two of those D latches in master-slave configuration to obtain a positive edge-triggered D Flip-Flop.

reference: Flip-Flops Wikipedia

Answer 2

Shorten your clock pulse so that it is gone by the time the output data from one flip flop reaches the D input of the next. At the moment, with a long clock high time, when the new data arrives at a D input it is transferred straight through the flip flop and on to the next because the clock is still high.

This is a technique for producing a very short clock pulse, the duration of which is shorter than the time taken for the data to transition through the stage.