1
\$\begingroup\$

I have 10 numbers saved in RAM. I sorted it using Verilog code and saved output in another RAM. I did simulation and it was doing correct sorting. I synthesized it and generate bit file. Now i want to see whether it performing logically fine after FPGA Implementation or not.But i am confused how will i get output sorted data after FPGA implementation.

Please suggest me how will I get output data after FPGA implementation so that i can check it manually and sure that my CODE is right with FPGA too. Thanks

\$\endgroup\$

1 Answer 1

3
\$\begingroup\$

There are several possibilities:

  • You can use ChipScope. That's an on-chip logic anaslyzer, which is synthesized into your design.

  • You can implement (or use) a FPGA to PC communication like UART to write numbers and read results.

  • You can implement a testcase in hardware (like your testbench) that enlights a LED if the testcase is passed.

  • ...

\$\endgroup\$
1
  • \$\begingroup\$ I took the third approach and it works for me . Thank you \$\endgroup\$
    – SW.
    Commented May 14, 2015 at 10:52

Your Answer

By clicking “Post Your Answer”, you agree to our terms of service and acknowledge you have read our privacy policy.

Not the answer you're looking for? Browse other questions tagged or ask your own question.