I am referring to high speed design with Spartan 6 FPGA. My query is, in design I am having 5V compliant devices (ADC,FIFO memory) and want to interface with 3.3V FPGA spartan 6.
If I opt for simple resistor,diode termination... Is it good option considering sampling rate of ADC 400kHz.
I want to consider all aspects such as power consumption,speed etc in case for Resistor-Diode termination or even for level translator. Please someone help for my understanding.
Attached App Note Link: 5V Tolerance Techniques for CoolRunner-II Devices. https://www.xilinx.com/support/documentation/application_notes/xapp429.pdf