So I have a circuit shown below, that looks to me likes it's a CMOS inverter circuit. In this question, we're asked to find the current and voltage across drain-source voltage of the NMOS component.
The values given for the PMOS are as follows:
VDD = 5.003V
VT,pmos = -509mV
µpCox = 101µV/A2
W/L = 2µm/1µm
Lambda = 0V-1
Likewise for the NMOS:
VT,nmos505mV
µpCox = 209µV/A2
W/L = 9µm/1µm
Lambda = 0V-1
So in my attempt to figure this out on my own, I got this:
Clearly, VS of the PMOS = 5.003V
Now after this is where I start to really question myself, and end up going in circles.If I assume that VG = VD based on the circuit diagram, then VGS and VDS are going to give the same value. Won't that then mean the PMOS is cut off?
I've also simulated the circuit in LTSpice. This gives VGSDS as the same value. Which appears to approximately be the source voltage minus the threshold voltage, but a little different. Here's that diagram and the related info it obtains.
Any help is appreciated. Especially in any conceptional mistakes or general assumption methods for the future!