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I know that on high speed digital communication trails sharp angles can cause some problems.

However, in some cases it is difficult to avoid them. For example, in the image below, the angle between tracks on different layers is close to zero degrees.

PCB with problems

To try to avoid this I created a "circle" using 45° angles. PCB with possible solution

My question is: does this technique really avoid the aforementioned problems? Are there better methods for this?

Also, do I need to be concerned about the angle of the tracks as they traverse different layers through vias?

Thank you

Edit: Yes, there is a ground plane on each of the two layers. Even the ground planes of both layers are connected in several vias.

As for vias, I always try not to use them. But sometimes it's impossible.

've always been really afraid of the angle of the same signal going through different layers through vias.

But when dealing with the same layer, this type of angle should be avoided, right?

Edit 2: For cost reasons, I'm only working with two-layer boards. So there are no inner layers. I had imagined that stubs are only formed on vias connecting inner layers or an inner layer with an outer layer. I am wrong?

The tracks shown in the image are of low frequency (activation of relays, enable pins and values for ADC of the microcontroller). I think we can say that there are no problems on these trails. Correct?

There is a DPI24 display operating at 65MHz, on which I use the 3W rule. These are the most worrisome tracks on my board.

Edit 3:

Two-layer boards don't have good current return paths?

Is it not possible to have good current return paths without a layer dedicated to a ground plane?

I was worried about the angle of the DPI24 (65 MHz) tracks. I thought that even with two layers, my board had good current return paths.

Thanks everyone for the discussion

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    \$\begingroup\$ You should be aware that 45° bends aren't ideal either. So adding a few more 45° bends in order to (maybe) do a slight improvement on the via? Probably won't improve anything. For high speed signals, avoid any via or bend that can be avoided. But regarding the angle on the different layers, I wouldn't care about it. \$\endgroup\$
    – Klas-Kenny
    Commented Mar 10, 2022 at 14:12
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    \$\begingroup\$ When you say "high speed", what do you mean? Be specific about the frequency band you are working with. \$\endgroup\$
    – The Photon
    Commented Mar 10, 2022 at 15:21
  • \$\begingroup\$ Depending on the edge rates of the signals involved, I would be more worried about coupling between the parallel traces. Though that's hard to ascertain without a scale or dimension on the layout. \$\endgroup\$
    – SteveSh
    Commented Mar 10, 2022 at 15:28
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    \$\begingroup\$ And finally, unless you've designed your vias with a 3-D field solver, they'll probably cause problems before the 45 deg bends will. Only a good SI tool will tell you what you need to know. \$\endgroup\$
    – SteveSh
    Commented Mar 10, 2022 at 15:37
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    \$\begingroup\$ Worrying about stubs and angles of traces when you have no return current paths is like worrying that you forgot to brush your teeth while your house is on fire. For low frequency stuff none of that matters and you're fine regardless. For high frequency or fast rise times, you need continuous ground planes for return currents or you'll have much bigger problems then stubs. \$\endgroup\$ Commented Mar 10, 2022 at 16:56

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There's 2 sharp angles here: 90° bend when going from the bottom plane to the via, then 90° going from the via to the top plane.

Neither angle is avoidable. (and also, the problem of sharp angles is widely overstated.)

The angle between the bottom trace and the top trace doesn't really matter, as far as I can tell. Note that I'm assuming you have a ground plane in between these layers – otherwise the real problem with your ground return path / trace impedance, and angles are the least of your problems.

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