I know that on high speed digital communication trails sharp angles can cause some problems.
However, in some cases it is difficult to avoid them. For example, in the image below, the angle between tracks on different layers is close to zero degrees.
My question is: does this technique really avoid the aforementioned problems? Are there better methods for this?
Also, do I need to be concerned about the angle of the tracks as they traverse different layers through vias?
Edit: Yes, there is a ground plane on each of the two layers. Even the ground planes of both layers are connected in several vias.
As for vias, I always try not to use them. But sometimes it's impossible.
've always been really afraid of the angle of the same signal going through different layers through vias.
But when dealing with the same layer, this type of angle should be avoided, right?
Edit 2: For cost reasons, I'm only working with two-layer boards. So there are no inner layers. I had imagined that stubs are only formed on vias connecting inner layers or an inner layer with an outer layer. I am wrong?
The tracks shown in the image are of low frequency (activation of relays, enable pins and values for ADC of the microcontroller). I think we can say that there are no problems on these trails. Correct?
There is a DPI24 display operating at 65MHz, on which I use the 3W rule. These are the most worrisome tracks on my board.
Two-layer boards don't have good current return paths?
Is it not possible to have good current return paths without a layer dedicated to a ground plane?
I was worried about the angle of the DPI24 (65 MHz) tracks. I thought that even with two layers, my board had good current return paths.
Thanks everyone for the discussion