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About designing the boards which carry the components of an electronic circuit, including placement of parts and routing of traces. For questions about getting them built instead use PCB-fabrication. If your question is specific to a certain CAD tool, say which tool and version you are using.

2 votes
Accepted

polygon floodfill

Perform a partial rip-up by clicking on the edge/perimeter of the filled polygon. This will just "clear" the polygon and leave everything else from the signal intact.
Rev's user avatar
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1 vote

How to mirror a large component in Eagle

Is there a way to force it to flip and then go into move mode so I can place it within the bounds? Yes. You can use the "move" command manually. If your components name is "ArduShield" type mov …
Rev's user avatar
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7 votes
Accepted

PCB Trace Layout to Minimize Inductance

Why does widening the above trace minimize inductance? The total inductance is a function of the self inductances of the traces (one of them being a plane in your example) and the mutual inductan …
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4 votes
2 answers
291 views

Design question regarding high current wires running below PCB

I am working on a layout that will look similar (not final) to the illustration below. There are three high gauge wires (red) 3x230VAC passing directly below the PCB (isolation touching the PCB) that …
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7 votes

What are the advantages of this gold finger shape?

Some PCB manufacturers mention some specific design requirements for gold finger edge connectors: No plated through holes are allowed in the plated area No solder mask or silkscreening can be presen …
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4 votes

How to provide version numbers to hardware schematics / PCBs?

We handle it the following way: Major.Minor.Revision Major is changed, if there were changes to board dimensions or extensive changes to component placement or general functionality. Like re-designin …
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41 votes
2 answers
20k views

Purpose of "wave shaped" PCB traces

On some PCB designs, specific traces are routed in curious ways. This probably has to do with high frequency design considerations and general signal behavior that I am not familiar with. Let's take …
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3 votes

How to connect large traces to pads in PCB?

In the end its all about power dissipation resulting in heat. Wider traces obviously reduce resistance, improve heat dissipation and thus are optimal. Realize that while trace resistance is a function …
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4 votes
Accepted

Eagle digital GND polygon does not fill

Looking at the clearance area around your pads, the problem is most likely the pad-to-wire clearance setting in your design rules. If the clearance (minimum distance) is set too high, the polygon plac …
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4 votes
1 answer
365 views

ADuM1301 digital isolator - PCB layout question

We are using the ADuM1301 digital isolator in one of our designs. The PCB layout section from the data sheet states: In applications involving high common-mode transients, care should be take …
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3 votes
3 answers
22k views

"Net Antennae Violation" on Pad -> Via -> GND plane connection

I just started routing my first PCB on Altium. It is a simple 2-layer board with bottom layer as dedicated GND plane. I started out placing GND vias for GND pads of the top layer SMD components like t …
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1 vote

How to hide selected rats nest lines in Altium?

In the PCB document, go to the PCB side panel. Select Nets from the dropdown menu. Select <All Nets> in the Net Class box. Right click the net to hide and select Properties. Check "Hide …
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0 votes
1 answer
79 views

Digital Isolator Layout - Creepage

In the Digital Isolator Design Guide from Ti, there are some PCB Design Guidelines regarding Creepage. In addition to wide isolator packaging, techniques such as grooves can be used to attain a desir …
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1 vote

Eagle: PCB layers stack-up and impedance

If you have a design with impedance controlled traces, you need to assume/define some PCB parameters to calculate the required trace width in the first place. Prepreg material and thickness, copper t …
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1 vote

Eagle PCB: "No Supply for Power Pin ..." error

The Electrical Rule Check executes, depending on the pin direction (specified by the author of the schematic symbol), various checks. It expects for the direction of type Pwr a Sup pin set for this ne …
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