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I am currently designing a processor on an Altera DE0 Nano and found out that the power consumption of my design may be computed by this equation:

P = C * V^2 * (a * f) where P is the power consumption/sec, C is the capacitance, V is the voltage, a is a constant and f is the clock frequency.

Can someone help me understand how to get the values for C and V? TIA.

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C will be determined by the number and size of your logic gates (along with wire distance). For an entire processor this will be hard to calculate by hand. You would want to add up all of the node caps in the design.

Software should be able to do this for you.

With Altera software this is called PowerPlay

As a simple example consider an inverter. Each time it switches from high to low or low to high, it has to charge/discharge all of its output node cap (including source/drain of NMOS and PMOS of the inverter, the wires, and any downstream gate caps).

V is the output voltage of the processor and, frankly, since you are designing the processor you should know this. I would guess 3.3V or 1.2V

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