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I can only learn by examples it seems. I feel I've understood my classes well... but I cannot for the life of me decide where to begin, or link my understanding to anything practical right now.

I need to do it using Proteus (or similar software?)

Do I make a 4-bit counter and join them together? How do I make D-flip flops synchronous?

I'm hopelessly lost.

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  • \$\begingroup\$ How do I make D-flip flops synchronous? ... think about this what keeps a musical orchestra synchronized? \$\endgroup\$
    – jsotola
    Commented Dec 15, 2022 at 17:21
  • \$\begingroup\$ A conductor - so a clock? However, in proteus I have 4 d-type flip flops and connected the clock into the next clock commonly - but I don't know what to connect to the data inputs. It needs to be 8-bit. But I don't know the truth table. \$\endgroup\$ Commented Dec 15, 2022 at 17:32
  • \$\begingroup\$ partly correct ... in relation to the conductor, what happens within the orchestra that keeps all of the musicians synchronized? ... in other words, what does each musician do to keep in synch? \$\endgroup\$
    – jsotola
    Commented Dec 15, 2022 at 17:36
  • \$\begingroup\$ High-low? Positive/negative edge triggers? \$\endgroup\$ Commented Dec 15, 2022 at 17:48
  • \$\begingroup\$ Can you at least make a 1 bit counter? And then make it into a 2 bit counter? \$\endgroup\$
    – Finbarr
    Commented Dec 15, 2022 at 17:51

1 Answer 1

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A synchronous counter clocks all the outputs at once (all the flops share a common clock.) This differs from a ripple counter, where the Q out of the previous stage clocks the next one.

To make a synchronous up counter, you need to compute the next (D-inputs) value by taking the present (Q-outputs) value and adding 1. This computation is done by an incrementer. You construct an incrementer from a series of half adders.

So in sum, you need:

  • four D flip-flops sharing a common clock
  • A 4-bit incrementer (4 half adders) to compute the next value

It is also possible to use JK flops in toggle mode, which simplifies the design somewhat. Example in Falstad These only require that you compute the state where the output bit flips (that is, when the lower-significant bits are all 1’s.) However, the ask is for D flip-flops, so you need to use the more complex logic. (Hint: a D flip-flop can be made into a toggle flop with the addition of an XOR gate.)

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