Search Results
Search type | Search syntax |
---|---|
Tags | [tag] |
Exact | "words here" |
Author |
user:1234 user:me (yours) |
Score |
score:3 (3+) score:0 (none) |
Answers |
answers:3 (3+) answers:0 (none) isaccepted:yes hasaccepted:no inquestion:1234 |
Views | views:250 |
Code | code:"if (foo != bar)" |
Sections |
title:apples body:"apples oranges" |
URL | url:"*.example.com" |
Saves | in:saves |
Status |
closed:yes duplicate:no migrated:no wiki:no |
Types |
is:question is:answer |
Exclude |
-[tag] -apples |
For more details on advanced search visit our help page |
The microprocessor is an integrated circuit that elaborates information in the form of digital signals. Not to be confused with a microcontroller, which embeds many additional devices to control embedded systems.
16
votes
2
answers
84k
views
What's the difference between a microprocessor and a CPU? [duplicate]
Possible Duplicate:
What’s the difference between a microcontroller and a microprocessor?
Please inform me of the difference, if any. …
2
votes
4
answers
771
views
History, reason for and implications of the 2 modes of a modern microprocessor?
What is it that changes when a microprocessor switches modes between user and superuser? …
0
votes
2
answers
355
views
Understanding branch prediction
On page 376 of Hennesay's book Computer Organization And Design, the following illustration is listed to illustrate branch prediction. But what do "IM" and "DM" mean? Does IM stand for instruction mem …
3
votes
1
answer
1k
views
What does RWM mean?
I'm studying computer hardware and the acronym "RWM" appears, so I wonder what it means? It has to do with LOADs and STOREs of instructions.
0
votes
2
answers
2k
views
What determines the number of bits for the address field in a cache memory?
I understand a cache memory is constructed for a basic block like this
Valid bit | Address bits | Data/Instruction
But what determines the length of the address bits? I understand that for a 32-bit …
5
votes
2
answers
4k
views
Difference between 2-way and 4-way caches?
I don't fully understand this picture:
If the data and instruction caches are separated, doesn't that mean that this CPU is not von Neumann model but Harvard model?
And what does it mean that one …
1
vote
3
answers
2k
views
Is it true that copying is the most CPU intensive operation?
A mech engineer said that copying puts more load on the microprocessor than "other" operations (e.g. moving data or creating the same amount of new data). Is this true? Can you elaborate? …
0
votes
1
answer
2k
views
How to calculate the address fields for a cache?
I've a homework question about 32-bit cache memories:
For a cache memory that has size 16kB (16384 byte) and blocksize 2
words, state the names and the sizes of each field of the address that
…
2
votes
2
answers
4k
views
What is the meaning of "Register.Rd"?
Reading Hennessy's book "Computer Organization and Design" it is mentioned "Register.Rd" and "Register.Rs" but what does it mean? The .Rd, .Rt and .Rs parts I can't understand, on page 365:
3
votes
2
answers
7k
views
Is the registry file made from SRAM?
I study computer engineering and I read Hennessy's book about Computer Organization where it's described how the microprocessor does pipelining and that the microproceossor has on-chip cache, as much as … 8 MB on-chip cache in a modern microprocessor such as AMD's Opteron. …