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I intend to use an IC which requires 14.3MHz clock input, but want to drive it from a stable 10MHz source - derived from GPS. How do I turn the 10MHz clock into the 14.3MHz that the IC requires?

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    \$\begingroup\$ What IC are you intending to use, and why does the frequency have to be exactly 14.3MHz? \$\endgroup\$ – Bruce Abbott Apr 19 '16 at 16:46
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What you need is a PLL, a phase-locked loop. It works by comparing one oscillator that you can control, with a reference oscillator. The trick is that it is easy to divide the frequency of an oscillator using a digital counter, so what you do here is to divide the 14.3 MHz oscillator by 143, the 10.0 MHz reference by 100, and then use the output from this comparison to make sure that the 14.3 source is running at an exact relation to the stable 10 MHz reference.

There are numerous circuits that can do all of this in one package, sometimes even including a reference oscillator. It is very common having to synthesize frequencies from a stable oscillator, so these are not unusual.

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  • \$\begingroup\$ I'm not sure how this is a valid answer. It seems to be assuming that the asker has a 14.3MHz clock source (or a second oscillator of any sort) -- which is what the question is about: how to get a 14.3MHz clock when you only have a 10MHz source. \$\endgroup\$ – Doktor J Apr 19 '16 at 13:42
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    \$\begingroup\$ @DoktorJ Obviously you have to add components. The question is about generating a 14.3 MHz signal from a 10 MHz source. A PLL chip will do this and the VCO required to generate the derived clock is often integrated on-chip so you don't need a separate IC for that. \$\endgroup\$ – pipe Apr 19 '16 at 13:55
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It is possible to change the order of multiplications and divisons to avoid frequencies above \$100~\text{MHz}\$. If you want a pretty square wave, the last step should be a divison by \$2\$.

\begin{align*}\frac{10~\text{MHz}}{2} &= 5~\text{MHz} \\ 5~\text{MHz} \cdot 9 &= 45~\text{MHz} \\ \frac{45~\text{MHz}}{11} &= 4.090909~\text{MHz} \\ 4.090909~\text{MHz} \cdot 7 &= 28.636363~\text{MHz} \\ \frac{28.636363~\text{MHz}}{2} &= 14.3181818~\text{MHz}\end{align*}

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  • \$\begingroup\$ This multiplication could be done without PLLs if you were more concerned with jitter than cost and size .If you did more math you may be able to hetrodyne and do things in fewer steps. \$\endgroup\$ – Autistic Apr 19 '16 at 10:07
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    \$\begingroup\$ This answer should be part of your other answer. You can edit it in, then delete this one. It's sometimes appropriate to provide two different answers on one question, but this one is just a further extension of the same answer. You can use --- to make a horizontal line to separate sections of a longer answer. \$\endgroup\$ – Peter Cordes Apr 19 '16 at 12:17
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If you want 14.31818181818 MHz from a source of 10 MHz, it is difficult. The 14.31818 MHz is the american TV color burst frequency, the precise value is 315/22 MHz. You may divide 10 MHz by 2, multiply by 9 and by 7 to get 315 MHz. Then you divide by 22 to get the frequency you want. May be more than one PLL is necessary to do that. Another way is to divide the 10 MHz by 4 and multiply by 9 and 7 and finally divide by 11.

Of course it is theoretically possible to multiply by 63 and then divide by 44. But this requires a very fast PLL oscillator for 630 MHz and also a fast frequency divider. I suggest to divide by 22 first, then multiply with 63 and finally divide by 2. But for a low phase jitter, separate multiplications by 9 and 7 may be better.

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  • \$\begingroup\$ My head spins... \$\endgroup\$ – Rev1.0 Apr 19 '16 at 7:26
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    \$\begingroup\$ Or just multiply by 63 and divide by 44. \$\endgroup\$ – Tom Carpenter Apr 19 '16 at 8:14
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    \$\begingroup\$ Why are you giving two answers? And why would an Australian need an American color burst frequency? :) \$\endgroup\$ – pipe Apr 19 '16 at 9:48
  • \$\begingroup\$ "Of course it is theoretically possible to multiply by 63 and then divide by 44. But this requires a very fast PLL oscillator for 630 MHz and also a fast frequency divider." It's more than theoretically possible to do this in a single PLL stage. For example the IDT versaclock 5 has a VCO frequency range of 2500 MHz to 2900 MHz. So you could multiply by 252 and divide by 176 \$\endgroup\$ – Peter Green Apr 19 '16 at 14:16
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What sort of chip are you using that has that requirement, and what would be the allowable jitter? If you could live with a large amount of jitter, one approach would be to use a device that turns both rising and falling edges into pulses (effectively doubling 10MHz to 20Mhz) and then discards 25 pulses out of every 88, or you could use a 25MHz or faster clock to drive a CPLD or FPGA which behaves similarly but uses the 10MHz reference to adjust how many pulses it needs to skip. Both approaches would have considerable jitter, but depending upon what is being done with the 14.3818Mhz clock that might be acceptable. If using it for NTSC chroma generation, the effects of jitter might be minimized if the frequency were chosen so that alternate frames would have roughly alternating jitter.

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  • \$\begingroup\$ Are you guys reading in some secret place I can't get to, or why do you assume that the question asks about 14.3818 instead of 14.3? \$\endgroup\$ – pipe Apr 19 '16 at 16:28
  • \$\begingroup\$ @pipe: In the US, crystals with a 3.5797545Mhz frequency are extremely common. They were mass-produced for color television sets, their ubiquity has made them cheap, and their cheapness has inspired many devices that could use an arbitrary frequency to pick that one. A number of other devices need to be able to work with things that use that frequency, but need to have several clocks for each 1/35797545sec event in the other device, so a frequency four times that amount is also popular. I've seen the frequency written as 14.3Mhz more often than 14.4, and I can't think of any other... \$\endgroup\$ – supercat Apr 19 '16 at 16:38
  • \$\begingroup\$ ...frequency I've seen used which is closer to 14.3Mhz. \$\endgroup\$ – supercat Apr 19 '16 at 16:39
  • \$\begingroup\$ I guess.. I just assumed that someone who thinks that a 10 MHz reference oscillator is important, would actually write out the exact frequency he needs. :) \$\endgroup\$ – pipe Apr 19 '16 at 16:43
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Although it is possible to "derive" 14.3mHz from a 10mHz oscillator, as shown in the other answers, you don't have to. A simpler solution, is to add a 14.3mHz crystal oscillator. The size, volume, and cost of this solution is comparable to the other solutions.

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  • \$\begingroup\$ He obviously wants to keep it synchronized to the GPS reference, otherwise the question does not make any sense. \$\endgroup\$ – pipe Apr 21 '16 at 20:10
  • \$\begingroup\$ @pipe: No, it is not obvious. I can not read the OP's mind, so I am offering an answer to the simplest interpretation of his question. \$\endgroup\$ – Guill Apr 21 '16 at 22:11
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    \$\begingroup\$ Come on, the OP literally writes: "but want to drive it from a stable 10MHz source". How can you interpret that as anything else? There are many use cases for something like that, 10 MHz is a common clock standard for labs and studios where you need all local clocks to be synchronized to a master clock. \$\endgroup\$ – pipe Apr 22 '16 at 7:43

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