JTAG Design for altera cyclone 3

Question

I am designing the JTAG for a Altera Cyclone 3 (EP3C5E144C8N). I was only aiming at normal JTAG, and do not need Active Serial. I have attached the schematic and board in the *.zip file (http://www.mediafire.com/?0gt55eyperbm385)

Or just a snapshot here:

Would you please having a look for me?

I have some doubts:

1. Should I connect nCE of JTAG directly in to nCE of the FPGA, or nCE from FPGA is connected to ground?
2. About the clock: I see that there are 16 clocks (clk0 t clk15). To which clock I should connect the output from oscillator to?
3. In my board, I only use 3.3V (the label VCC means 3.3V). Is that ok?
4. By the way, would you please showing me how to add a flashing LED to indicate the JTAG is working?

Answer 1

Should I connect nCE of JTAG directly in to nCE of the FPGA, or nCE from FPGA is connected to ground?

I'm not sure what you mean by "nCE" of "JTAG", but the nCE pin of the FPGA should be tied low. It is only used in multi-device configuration scenarios, where you daisy chain devices by connecting nCEO of one device to nCE of the next.

About the clock: I see that there are 16 clocks (clk0 t clk15). To which clock I should connect the output from oscillator to?

It doesn't matter, choose whichever is easier for you to route.

In my board, I only use 3.3V (the label VCC means 3.3V). Is that ok?

I doubt it. Doesn't the device require 1.2V for core logic and 2.5V for PLL?

By the way, would you please showing me how to add a flashing LED to indicate the JTAG is working?

You can just connect a LED via resistor between 3.3V and TMS. The pin is driven by the programmer and will be low most of the time during the programming.