All Questions
Tagged with computer-architecture arm
15 questions
2
votes
1
answer
569
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Program counter updating in a single-cycle ARM processor
This picture is from the book Digital Design and Computer Architecture: ARM Edition. It implements the LDR instruction.
I have one question:
R15 is supposed to be PC+8. In the picture, is R15 ...
- 299
4
votes
1
answer
2k
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Are processor instruction sets royalty free? (e.g. ARM v9, x86)
I asked a general question on Law SE with one example (ARM) and for that example, I was directed to What exactly does ARM sell to vendors?.
I've read that QA that ARM sells actual core designs.
I've ...
- 265
0
votes
2
answers
393
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Difference between ARM7 and intel i3, i5 & i7 processors
I am just starting out on a journey to understand microcontroller and microprocessor design. Have read briefly on their differences (ARM7 and Intel i3, i5 & i7).
Couldn't find any information on ...
- 23
1
vote
0
answers
145
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DMA SPI performance
I am currently writing an SD card driver for a Microcontroller using SPI and DMA. The SPI has a FIFO that can store 4 data values from the data register which has the capable of storing 32 bit. But it ...
- 11
1
vote
1
answer
727
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Cortex-M3, Code region vs SRAM/RAM
In the ARM Cortex-M3 processor core, the memory map contains: a Code region, SRAM and a RAM. What makes the use of the code region different than the other memories? In addition, what is the nature of ...
- 527
2
votes
3
answers
617
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how to determine architecture core detail of ARM11 processor
I'm cross-compiling for an embedded Linux board, based in BCM5892 ARM11 processor.
I need to know about architecture detail of this processor(‘armv6’, ‘armv6j’, ‘armv6k’, ‘armv6kz’, ‘armv6t2’, ‘...
-4
votes
1
answer
102
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Where to study Cortex R architecture? [closed]
I am interested to study Cortex-R architecture but I cannot find its details online. Is it proprietary detail or should I ask for this information from arm.com? Obviously I am not looking for the ...
- 1,489
3
votes
2
answers
90
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Why is the cache size identification register on ARM CPUs accessible from privileged modes only?
Is there any logical decision making behind this, to my understanding it exposes only the same information as CPUID instruction from x86 so why is it only made accessible to EL1? Is this in some way ...
- 131
5
votes
1
answer
16k
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How does the BSRR register work?
On the GPIOs of some ARM-based microcontrollers, you are given a register BSRR which you can write to to perform atomic changes in a ports output register.
For ...
- 428
0
votes
1
answer
55
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Minimal components for arm A9 dev board
If someone wanted to make a barebones dev board, what is needed to get an a9 processor running? Is it reasonable for a school project or will attempting to route the ddr memory and getting it ...
- 740
-1
votes
2
answers
939
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Difference between MIPS and ARM datapaths [closed]
I have just learnt simplified five stage pipelined MIPS architecture in the class. I am reading other Instruction Set Architectures (ARM currently) and found some differences between ARM and MIPS. ...
- 113
-1
votes
1
answer
632
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ARM architecture question [closed]
What is the role of marked area? Where is the address going? Also shouldn't there be an arrow from instruction decoder leading somewhere?
I know basics of comp arch and know am aware of program ...
- 13
0
votes
1
answer
1k
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ARM7 Memory model (Flash, SRAM, registers. ...) [closed]
I ma newbie in ARM world. I am have basic background working with AVR controllers. AVR has separate physical memory blocks (like EEPROM, FLASH, Data). It is very ...
- 1
37
votes
5
answers
7k
views
What exactly does ARM sell to vendors?
Assumptions:
Computer architecture: Describes how the different modules of a processor interact with each other.
A computer architecture is defined using vhdl ...
- 541
7
votes
4
answers
7k
views
Are the instructions fetched from RAM or ROM in an ARM micro-controller?
In many tutorials regarding ARM CPU registers, the instruction register is mentioned in such way: "Register R15 in ARM micro-controller is the program counter and it points to the next instruction to ...
- 12.2k