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Alex's user avatar
Alex
  • Member for 8 years, 9 months
  • Last seen more than 8 years ago
16 votes
1 answer
3k views

Would it be considered good practice to match the lengths of UART's Tx/Rx traces?

8 votes
1 answer
3k views

Is it considered bad practice to put Vias on BGA pads?

7 votes
3 answers
3k views

How do pick and place machines pick up components?

4 votes
1 answer
3k views

Tolerances for DDR3 trace matching?

3 votes
1 answer
2k views

Is it good practice to length match all traces of DDR3, or are only data traces important? [duplicate]

1 vote
0 answers
64 views

Micro controllers with high speed switching capabilities

1 vote
3 answers
820 views

Why does the die of a desktop CPU need to be so small?

0 votes
1 answer
1k views

Difference between and meaning of VSS & VDDS

0 votes
1 answer
877 views

Are DDR3 SDRAM's DQL and DQU pins different?

0 votes
1 answer
979 views

Name of Fibre optic motherboard connector, like ethernet socket?

0 votes
2 answers
374 views

12v switching ChipFet with a 3V gate? [closed]

0 votes
1 answer
92 views

Configuring a Virtex-5 FPGA over USB?

0 votes
1 answer
680 views

TX/RX pins on Xilinx Zynq

0 votes
2 answers
109 views

Best way to create a regulated 1.95V?

-2 votes
1 answer
32 views

Voltage input values for Si550 voltage controlled oscillator?