All Questions
9 questions
0
votes
1
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215
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Importance of ADC Speed for Accelerator Pedal Position Sensor (APPS)
We are building a electric vehicle and need an accelerator pedal position system.
We have the circuit designed as shown below.
When simulating our circuit, the ADC speed of the Arduino Uno seemed slow....
- 173
1
vote
1
answer
504
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There is a way to write into FIFO on both clock edges?
Im using Lattice ECP3 FPGA, didnt found any information about it on the internet.
I have ADC which providing me 12bits data on both clock edges, so I used Lattice High Speed I/O Interface:
This ...
- 549
1
vote
2
answers
533
views
VHDL: ADC to USB Buffering using Fifo
I am trying to understand what is the correct way of doing such application, so please do not ask for complete code because each component is working fine on its own. I am struggling in the way of ...
- 149
0
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1
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2k
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Input/output from unsynchronized ADC/DAC
DISCLAIMER : this question is somehow related to this other question of mine, but the latter did not have any satisfying
answer.
I'm working on an audio DSP project with the STM32F4xx, using 4 ...
- 370
1
vote
1
answer
702
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How to interface an ADC with FPGA through the CLKOUT signal in verilog?
I have a ADC (TLC2323-12) that (as far as i understand from the datasheet) has two modes of controlling the output of the converted signal. One method is with the input signal SCK that can be ...
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0
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1
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1k
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Parallel ADC IC interface to FIFO Memory
I am referring below schematics attached here.
ADC AD7821KP IC is interfaced with IDT7203 FIFO memory. Now, I want to use 12 Bit ADC in above schematics. But I am not able to find 12 bit FIFO Memory ...
- 739
0
votes
1
answer
684
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FPGA: Choose RAM or FIFO for ADC input to be filtered
I will connect an ADS4125 12-bit 125-MSPS ADC with 6-bit parallel DDR LVDS output, with an Altera MAX10 FPGA. The sampled data is over a duration of 100 us, and will be filtered in the FPGA. I will ...
- 425
2
votes
2
answers
449
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FIFO-related data transmission problems between microcontroller and PC
I have a situation in which a microcontroller is to perform a large number of ADC conversions and format the results into commands (or data packages) and send these to a PC using the UART. In order to ...
- 325
1
vote
1
answer
656
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How to interface 1 MSPS ADC with processing module in FPGA?
I have DE1-SoC board which contains 1 MSPS ADC, I am trying to take samples from ADC and process them. ADC Controller clock is 20 MHz and data is available every 16 clock cycles. The module that takes ...
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