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A Field-Programmable Gate Array (FPGA) is a logic chip consisting of an array of programmable logic blocks and interconnects that is configured by the customer after manufacturing—hence "field-programmable".

1 vote

VHDL - Adding two std_logic_vectors, issue

When you assign a signal (with <=), then the signal is updated after the process. I suggest you assign a variable first or do the "overflow <= bit9_result(8);" outside the process.
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  • 149
2 votes

Minimalistic TCP/IP implementation on FPGA

You can have a look at FPGA Cores. They do Ethernet cores with TCP and more without processor. Maybe you can get some ideas from that. I have used them in several projects. Probably Xilinx only. …
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  • 149
0 votes

FPGA streaming data

I think the easiest way to communicate between PC and Xilinx FPGAs is to use a ready build Ethernet core from FPGA-cores.com. You can find them here. …
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  • 149
1 vote

Program FPGA without JTAG?

Now we use this remote programmer from FPGA Cores: The programming is done over Ethernet and you need to add one of these Ethernet cores. It works very good and we can also do remote debugging. …
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  • 149
2 votes

How to stream data from embedded system to PC fast?

I should use an FPGA. I don't think you need a high-end FPGA for this project. An Artix or Spartan 7 from Xilinx can easily handle that data. … The site FPGA Cores has a core that you can connect to an RGMII phy directly and you will be up and running in minutes. The cores are free to download. …
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  • 149
0 votes

Sending data to FPGA

I can recommend you to have a look at these Ethernet cores. These do all Ethernet and TCP without processor and are very easy to use.
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  • 149
4 votes

Booting multiple FPGAs using a single SPI Flash

One FPGA or MCU serves as master and the others slaves. No problem. See chapter "Slave Serial Configuration" UG470. …
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  • 149
0 votes

32 bit to 7 segment display (FPGA)

If you want to make it simple you can use Instant SoC. Instant SoC has a segment display class. There is a project using this on Digilent Project Vault: RISC-V on Nexys
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  • 149
1 vote

What features should/must be present inside a prototype FPGA board to aid in debug?

FPGA Cores provides an easy way for the customer to update the firmware with the remote programmer tool. If you want there are also an embedded scope that you can use. …
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  • 149
0 votes

found '0' definitions of operator “*”

Both operands must be unsigned. And the result must be casted to std_logic_vector. I.e. add .. std_logic_vector( unsigned(Content(to_....))) * unsigned(K) )
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  • 149
1 vote

royalty free embedded processor

I have been using the Instant Soc RISC-V in a couple of projects now. It really works great. It build an optimized RISC-V core and all around that based on your C++ code. It uses gcc and a compiler th …
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  • 149
2 votes

Best board-to-board low latency protocol/interface

You should definitely use the gigabit transceivers. With Spartan 6 you can send up to 3.125 Gbps using one transceiver so that is no problem. These transceiver works very well and are very easy to im …
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  • 149