New answers tagged

1

As others have noted, I would avoid SPI at that distance. However, if you want to link to be faster, I would recommend passing your UART signals through a full-duplex LVDS transceiver on each PCB. The differential signals will minimize radiated emissions, allowing your bit rate to increase significantly. Something like the DS90LV019 should meet your ...


1

I wouldn't use SPI at one meter due to the fact MOSI pulse doesn't start until the slave receives the clock pulse but must reach the master before the next clock pulse. Just sayin' It's also a pain since the link is always initiated and controlled from one end and dummy bits are required for the master to receive when it's not sending. It's even trickier ...


4

I tested it, and it works (115200 baud rate), there's just a small ~20ms latency getting a reply when sending a request from PCB1 to PCB2. That latency is almost certainly nothing to do with the data rate of 115 kbaud. In 1 ms there can be 115 bits transmitted so, unless your message protocol requires thousands of bits, you are going to be stuck with ...


0

USB-to-UART converter is an active device that reads AND sends data following some protocol. Logic analyzers, by concept, only "sniff" the bus and can't generate active bus signals. In reality there are logic analyzers that have a "reversed" function and can generate traffic on their own, but they are called "logic exercisers" and need additional pre-...


1

The low cost USB device that you linked to is designed to be a logic analyzer and not a USB to TTL UART cable. In fact its usage even requires the use of specialized software to make it work that way. Sure the described usage of the logic analyzer allows it to be used in probing and analyzing the signal line protocols of a TTL UART interface but that does ...


2

It looks like UART with hardware flow control. Page 15 in the data sheet states that it supports hardware flow control on the USART https://www.silabs.com/documents/public/data-sheets/efr32mg12-datasheet.pdf By searching for “uart hardware flow control” images, several plots with similar data and “ticks” appear.


0

To state the obvious, no, there is no "support" in the transmitter that is required for an RX interrupt on the receiver side. If you get the transmitter data by polling, the RX interrupt should fire, provided you enable it correctly.


4

If I setup the TX lines of the slaves as Open Drain it works fine, but the signal doesn't have steep ramps. I thought this happens due to Pull-up resistors. Yes. Since the lines are said to be open drain, the lines goes high via charging a \$R*C\$. The capacitance is of the bus and the connected pins and the resistance is the pull-up resistance. ...


1

TX is an OUTPUT. If they are push/pull, and one TX is high and the other is low, you have a short. If they are open-drain and tied high, any output can pull the entire bus low on it's own, without causing a short.


1

RS-485 supports multi-drop topology. This is probably a better choice for your system as it has improved noise immunity and won’t need to be open-drain. It’s the go-to solution for low-speed control networks like you describe.


0

Lets assume 100 picoFarad per meter for your cabling (twisted pair? coax? etc) Assume 100 microseconds symbol time (bit time). Assume you want 63% (one time constant) of final value in 10 microseconds. We'll use 1,000 ohm Rpullup to make the math easy, then adjust to 2.7Kohm later. 1Kohm and 1nanoFarad is 1uS timeconstant. We can allow 10uS. Thus you can ...


2

The procedure is pretty much the same as with a Nucleo board. As was later pointed out to me, the specifics will be different on different STM32 chips, but here's what I used (on an STM32WB55). I assume your job will be similar at a high-level, but the details of the specific API calls may be different. Also note that if you use CubeMX to assign and ...


4

The issue here is that both usart_write_buffer_wait() and usart_read_wait() are blocking. The USART hardware seems to have a 2 byte FIFO buffer on RX. Now what happens is the RX FIFO is filled during writing, and usart_write_buffer_wait returns during the transmission of the last character. As soon as usart_read_wait is called - which can only happen after ...


2

Unidirectional voltage suppressor diode with clamping voltage greater than 3.3 V is sufficient. For the positive spikes, the ESD diode will kick in into action soon after the voltage reaches the clamping voltage. For negative spike, the TVS diode acts as normal diode shorting the signal soon after the forward voltage of the diode is crossed. SMF series from ...


2

A framing error is a logic low in the STOP bit position, rather than the correct logic high. The STOP bit position is 'n' bits after the START bit (logic low). 'n' depends on if you're using 8-bit or 9-bit data and if you're using parity: 9 for 8-bit data, no parity 10 for 8-bit data, parity 10 for 9-bit data, no parity 11 for 9-bit data, parity ...


2

Most modern UARTs will receive with one stop bit no matter how they're set up. The two stop bit thing is an instruction to the transmitter, to send data that a picky receiver can deal with. Two stop bits is really a remnant of an older, bygone age.


3

While the Mega2560 is not the fastest process around it should be fast enough to handle the amount of data you are looking to process. You do need to understand what the functions you are using are doing though, as well as how internal buffering works and the data rate limitations you are facing on your various serial interfaces. Serial::readBytes will ...


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