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5 votes
6 answers
751 views

Were vacuum tube computers made of logic gates?

A lot of introductory resources on modern CPU present them as being built from NAND gates (see here and there for instance). Actually, it is possible to build a modern CPU using almost exclusively ...
Weier's user avatar
  • 187
0 votes
1 answer
62 views

Retrieval of information from a sequential circuit

SR-NOR Latch circuit is a sequential circuit in which there exist two, different modes Reset and Set. Electricity flows along ...
Cake's user avatar
  • 1
-1 votes
1 answer
94 views

Is floating point IEEE754 binary digit represented using special unit/circuit for arithmetic operation?

We know that two un/signed integers arithmetic operation using special circuit called full-adder to execute arithmetic operation in Arithmetic Logic Unit (ALU). The full-adder I mean is classical ...
Muhammad Ikhwan Perwira's user avatar
1 vote
3 answers
157 views

Has there been any deliberate implementation of combinational logic soft error correction in any consumer-level product, like a CPU/microcontroller? [closed]

Prologue It is well known that many error detection, mitigation, and correction methods, such as parity or ECC, have been available in large memory banks, like for RAM, for decades now, and even in ...
H2SO4's user avatar
  • 131
6 votes
1 answer
7k views

4-bit decrementer using four Half Adders

Like the title mentions, is it possible to design a 4-bit decrementer using just four Half Adders? I know it's possible using 3 Full Adders + 1 Half Adder, but I don't seem to find a way to do that ...
ATK's user avatar
  • 63
1 vote
2 answers
710 views

Designing a Combination Lock FSM: Converting State Diagram to Logic Gates

I am trying to design a Synchronous combination lock for my digital logic class. I have the state diagram, as I understand how to draw out the logic which I want to follow. However, I am struggling to ...
graphpaper's user avatar
3 votes
1 answer
514 views

Are Tri-state buffers even necessary?

I'm trying to make a 1-bit computer, and I'm stuck on the registers. I think I am going to have 2 of them, and I want a way to separate their outputs. Let me explain. Let's say Register A has a 0, and ...
Trevor Mershon's user avatar
1 vote
0 answers
226 views

Can a classical Toffoli gate be built from irreversible gates?

The Toffoli gate is a reversible gate with three inputs (A, B, C) and three outputs (S1, S2, S3) generated as S1 = A S2 = B S3 = AB ^ C It can be implemented in a classic way using the following ...
SrJaimito's user avatar
  • 191
0 votes
1 answer
99 views

There's Conflicts in the Definitions of XNOR? [duplicate]

XNOR has two definitions: \$1^{st}:XNOR=NOT(XOR)\$ \$2^{nd}: XNOR(A,B)=\overline{A}\cdot\overline{B}+A\cdot B\$ The problem is that these definitions are not equal in Odd inputs, the second ...
Sammy Mishal's user avatar
49 votes
8 answers
18k views

Why are NAND gates used to make AND gates in computers?

Why is this a standard for AND gates when it could be made with two FETs and a resistor instead?
user avatar
-1 votes
2 answers
554 views

What characteristics of a transistor to use for an 8 bit transistor computer

I recently purchased the book 'Code' which, for those who don't know, is an insight into how computers work on the hardware level - going down to basic components and how various parts of a computer ...
adam's user avatar
  • 109
1 vote
1 answer
8k views

Bitwise shift operation from NAND?

I'm building an 8-bit computer using the Ben Eater's videos and I would like to improve the ALU, e.g. add nand bitwise operation because every logic gates can be built from this. But I ask myself if ...
Ardakaniz's user avatar
  • 187
-2 votes
2 answers
4k views

Building a XOR gate on 3 inputs using only 5 AND/OR/NOT gates

I would like to implement a XOR gate which takes a 3-bit input (in other words, the modulo-2 sum of the input bits) using only 5 ...
Gab's user avatar
  • 1
1 vote
1 answer
256 views

Is there any Static Hazard?

I read about Static Hazard. We know Static 1-hazard is: Input change causes output to go from 1 to 0 to 1. My note covers a Circuit as follows: My notes says: When ...
Michle Sipser's user avatar
1 vote
1 answer
82 views

Simple Mux Equation finding, need help?

How we can find the equation of following simple diagram ? My TA solved it as : C.Not(B).A + B.Not(A)
Maryam Ghizhi's user avatar
3 votes
3 answers
815 views

Logical Design Operation, A Simple Questions?

I'm so sorry if I ask my first question that so simple. My filed is Math and Computer science. I self-study Digital Design. My challenge is how we can find the operation of the two following ...
Ali Movagher's user avatar
-3 votes
1 answer
226 views

Logic Gate Cookbook [closed]

Is there a concise book that brings together all of the different Logic devices that can be implemented with basic logic gates? I have several digital/computer architecture books that have the ...
jpxrc's user avatar
  • 65
3 votes
2 answers
409 views

Simplifying Circuits

I have a question regarding simplifying a circuit of a function below that has 5 logic gates in original. f = (A + B) * (C + D) + (A + B) * (C + D)' + C = (A + B) * ((C + D) + (C + D)') + C = (A + ...
IANIK's user avatar
  • 35