15
votes
Why are the advantages of JFET over MOSFET, or why are JFET still used?
The JFET has several advantages over the MOSFET. The most important are:
higher gain
lower noise
These are the overriding factors when building preamplifiers for low-level signals, such as those ...
- 178k
15
votes
Accepted
Why does the FET input stage of op-amps still have an input current limit?
Those are absolute maximum ratings.
And it does not mean that current goes through the FET gate, but protection circuitry, such as clamping diodes to VCC and GND.
If you exceed the maximum allowed ...
- 172k
12
votes
Accepted
How to get an analog signal 0 to 12 V DC based on reference 0 to 5 V DC?
You need feedback if you want an exact ratio of 12/5, an open loop transistor will not do this. I would use an opamp with a transistor amplifier. You could also look for an opamp that will output 55 ...
- 17.4k
12
votes
N-Channel JFET analog switch clarifications
R37 and R38 provide a path for leakage currents to ground. Without them, when the JFET is off, C29 and C28 would be charged by these leakage currents and end up with random voltages on them. Then, ...
- 81.8k
10
votes
What is the advantage of gate resistor (R3) in this JFET voltage divider biasing circuit?
Historically, high value resistors (especially carbon film types) have tended to have a lot more drift (both with temperature and with time) than lower values. If one of the resistors in the divider ...
10
votes
Are there two sorts of *geometry* of JFET?
From National Semiconductor Discrete Semiconductor Products Databook 1989, an illustration of top-contacts of the N-channel FET (process 55) suggests that the gate does go underneath. This ...
- 27.6k
9
votes
What kind of transistor turns on with 0.2 volts?
Whilst I'm inclined to agree with @Bimpelrekkie that this is probably an X-Y problem, for those who might actually need such a device there are some options. Most MOSFETs are sold as enhancement or ...
9
votes
Accepted
What is the advantage of gate resistor (R3) in this JFET voltage divider biasing circuit?
If you add a large capacitor across R2 it will make a difference. In that case, the power supply noise won't be amplified by the amplifier.
simulate this circuit – Schematic created using ...
- 15.7k
9
votes
Accepted
In a JFET, is the gate *always* connected to the bulk/substrate?
When a JFET is produced using the common planar process, the channel is first diffused into the bulk and, in order to insulate this region from it, the bulk is given the same doping as the gate region....
- 3,507
8
votes
Accepted
JFET as an amplifier
What is the functionality of R2 here
It's used to bias the gate to 0 volts. Because an N channel JFET works with a range of negative voltages on the gate with respect to the source, biasing this way ...
- 473k
8
votes
Accepted
Are there two sorts of *geometry* of JFET?
The first sketch shows the principle of a JFET (in a way that is easy to analyze mathematically). The general concept (in any JFET) is that the depth of the conduction region (between S and D) gets ...
- 20.3k
8
votes
Accepted
Maximum safe gate-source voltage (gate current) for JFET
JFETs have no long-term reliability problem with the gate junction being forward biased provided you limit the current. It’s a diode junction, not an insulator as in a MOSFET.
A typical datasheet ...
8
votes
Accepted
Overvoltage protection with ultra low leakage current for 3.3 V
One way of doing this is to use diodes, but instead of connecting them to some clipping voltage, “guard” them by connecting them to a voltage follower that tracks the sense line voltage. The voltage ...
- 1,765
7
votes
Choosing an SMD JFET
I'd like to implement this circuit using a surface-mount JFET, but
frankly don't have the expertise to pick out one which is likely to
work for me.
I don't know how many people we tell to LOOK AT ...
- 473k
7
votes
Accepted
What kind of transistor turns on with 0.2 volts?
No single transistor can do what you want. Instead, you need to use multiple transistors. A simple voltage comparator will do what you want:
simulate this circuit – Schematic created using ...
- 178k
7
votes
Are there two sorts of *geometry* of JFET?
You're looking at two drawings and assuming they're factual
While the first drawing is a simplification for the purpose of showing basic structure and operation and the second diagram is more complete ...
- 683
7
votes
Accepted
Why does the thermal noise of this large resistor not contribute to the input noise for this JFET-input inverting amplifier?
Keep in mind the application: you're evaluating voltage regulators. They have low source impedance Rs. The input filter, filled in with the source that was missing in the schematic in the question, ...
7
votes
Why does the thermal noise of this large resistor not contribute to the input noise for this JFET-input inverting amplifier?
The Johnson (thermal) noise of a resistor is
$$ E_t = \sqrt{4kTR \Delta f} $$
Where:
k = Boltzmann' constant = 1.38e-23
T = temperature in °K
R = resistance
\$ \Delta f \$ = bandwidth in Hz
At room ...
- 11.2k
7
votes
Accepted
How does one set the Q-point for a JFET cascode amplifier, and what are the correct "Idss" requirements for cascoded JFETs?
Beyond formal classifications
Formalisms simplify and facilitate our work, but they make us not think and apply ready-made patterns. Such is the formal "common-something stage" ...
- 19.5k
7
votes
Accepted
Simulation of JFET Amplifier in LTspice
You have the output capacitor C2 connected to the drain which is connected directly to the positive supply, so you're not going to measure any signal.
You can connect the capacitor to the source, but ...
- 27.9k
7
votes
Accepted
Can I use a JFET if its drain current exceeds the Saturation Drain Current from the datasheet (or is my JFET faulty)?
The Idss current of JFETs varies greatly between different pieces.
Based on the graph on page four of the datasheet cited, the Idss current of your example is should be around 55 mA. In other words, ...
- 2,506
6
votes
MCU Controlled JFET switch for negative voltage?
You could tag a voltage divider off an PNP like this
simulate this circuit – Schematic created using CircuitLab
Note Vcc shown above is expected to be 5V. If your logic output is at a lesser ...
- 47k
6
votes
What is a small signal? What is a small signal equivalent circuit?
'Small signal' is where variations in voltage and current are so small that we don't explore the non-linear parts of the device V/I curve.
At any a given bias point, we forget about any curvature and ...
- 174k
6
votes
Why are the advantages of JFET over MOSFET, or why are JFET still used?
JFETS have a useful biasing, like a vacuum tube biasing. Simply place a 100 ohm resistor in the Source pin to Ground to control the current, and you can then connect Gate to a DC_conducting sensor ...
- 35k
6
votes
Accepted
Proving that this JFET + Bipolar source follower give back a linear output
The base current of the NPN is approximately VOUT/R2/beta. R1 is chosen so that VBE/R2 is >> that base current. Note that this value is nearly constant as VBE only changes slightly when the ...
- 20.3k
6
votes
Accepted
Why does this JFET buffer perform so poorly at 82 MHz?
Expanding on Andy's answer: note that analysis of this circuit, in general is kind of dubious. Let me explain in what sense I mean that:
Consider the inductance between most any two points in the ...
- 45.6k
6
votes
Accepted
Why is drain-source parasitic capacitance(Cds) omitted in JFET datasheets?
In a typical MOSFET, the source contact is connected to the bulk substrate. Therefore, there is a diode junction between drain and source/bulk - the typical MOSFET reverse diode. This diode's junction ...
- 20.5k
6
votes
Two JFET circuit
Each of the JFETs is diode-connected:
simulate this circuit – Schematic created using CircuitLab
The protected line is clamped to within about ±0.5V from ground for sources driving well under ...
6
votes
Accepted
Why don't these JFET simulations agree?
I believe I have an acceptable hypothesis about an origin of this pesky zero in your SPICE simulation. First, notice that this zero is due to an active load of your JFET amplifier. To verify this ...
- 4,630
6
votes
Accepted
Why does characteristic equation and DC model equation for drain current in JFETs do not agree?
The second equation is the small signal model of a transconductance (e.g. a transistor operating in it's transconductance regime). The equation characterizes how much the drain current varies around ...
- 1,125
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