Questions tagged [programmable-logic]
Programmable digital logic devices include FPGAs, CPLDs, and older devices such as GALs and PALs. Programmable logic enables flexibly implementing complex digital functions in a single chip, from a few gates of glue logic to entire microprocessors or complex signal processing systems.
245 questions
-3
votes
2
answers
2k
views
Learn CPLD from zero [closed]
a) Should I learn VHDL or Verilog? Is one excel in some area while the other better fit another area?
For simple "glue logic", says, 5 to 30 TTL chips equivalant, which is better?
b) First ...
- 999
0
votes
1
answer
1k
views
Why is ISE / XLS is mapping a signal to the global clock GCK0?
I've synthesized a design for a Coolrunner II CPLD. I intend to use the CPLD's internal clock. I have an input named CLK. I look at the fitter report and I see this:
...
- 946
8
votes
2
answers
2k
views
Why does this Verilog hog down 30 macrocells and hundreds of product terms?
I have a project that's consuming 34 of a Xilinx Coolrunner II's macrocells. I noticed I had an error and tracked it down to this:
...
- 946
4
votes
1
answer
1k
views
CAN controller in a CPLD
As I cannot manage to find it done on internet, I wonder if it is possible to program a CAN controller in a CPLD ? It's look like it is going to require a least an FPGA.
- 815
2
votes
2
answers
2k
views
Alternate programming software to program Altera CPLD
I am using a Altera MAX V CPLD. When I try to program the CPLD using QUARTUS II, it is reading the device ID and silicon ID correctly, but it failing during verification.
I tried to isolate the ...
- 21
3
votes
3
answers
1k
views
CPLD best practice for resetting a counter
My application has a bog-standard count-until-a-certain-number-then-reset-the-counter section. My experienced friend tells me that when using actual chips, it's common to increment the counter on the ...
- 946
1
vote
1
answer
177
views
Why does changing an 'add' to a logical or devour 7 CPLD macrocells?
I have a design that's synthesizing to about 50 macrocells.
I have this section of code:
...
- 946
4
votes
1
answer
397
views
Verilog - A line stays high, I need it to go low after a while
I'm working on a circuit in Verilog to be implemented on a CPLD. The output of the circuit will drive a stepper motor. The input is a stream of pulses from a machine.
I generate a stepper pulse ...
- 946
3
votes
1
answer
586
views
Xilinx CPLD macrocell capacity
I'm a beginner who's become interested in Xilinx CPLDs. I get what CPLDs do, but I have no feel for the quantity of logic a macrocell can support or the sorts of situations where macrocells become ...
- 946
4
votes
1
answer
489
views
Custom-CPU builder/simulator
I googled deeply but couldn't find any cpu constructor simulator.
I'm specifically hoping to learn about the operation of the northbridge, but When I googled "bridge simulator" or "bridge (the ...
7
votes
1
answer
13k
views
What is the difference between a GAL and a PAL?
I was reading this article (unfortunately a lengthy Dutch discussion) talking about a GAL. I have come across the GAL device before, but never really understood what a Generic Array Logic is. I know ...
- 33.4k
1
vote
2
answers
3k
views
adc-fpga interface guidelines for vhdl
I want to interface 3 separate ADS8548 ADC with XC3S200AN fpga. The fpga masters the control lines of the ADCs and it also acquires the digital data from the ADCs through parallel bus.
I will have ...
- 1,156
3
votes
2
answers
1k
views
Arduino to CPLD to toggle an LEDs using I2C
I have a a CPLD (Lattice MachXO2) that echos a signal from an Arduino to turn on an LED.
Arduino:
...
- 31
10
votes
3
answers
6k
views
What happens when an FPGA is powered on and left unconfigured?
I am trying to get a general understanding on what happens if you leave an FPGA unprogrammed for a long duration of time.
Suppose you have an FPGA and you leave it unprogrammed for a long period of ...
- 477
1
vote
1
answer
1k
views
Programming Xilinx XC9572
Can I read and save the program from a Xilinx XC9572 and burn it to another blank DC9572? I have a Needhams EMP30 which has this device on its list. I need the adapter for the PLCC 44 pin to DIP. But ...
- 191
2
votes
3
answers
3k
views
How does CPLD propagation delay work?
My question is about CPLDs in general, but take for example this cheap Xilinx one.
I understand that unlike a microcontroller, a CPLD does not have a clock; external edges activate the logic ...
- 389
1
vote
1
answer
707
views
Schneider EGX100 Gateway with AB PLC 5 series [closed]
I was investigating hooking up Modbus devices to an AllenBradley PLC 5/40E using a Schneider Electric EGX100 Ethernet gateway.
I can access the web server on the gateway device and monitor the slave ...
- 229
4
votes
4
answers
5k
views
Wrong outputs in VHDL entity
I have lessons about VHDL in one of my university class and I have to write simple entity which will generate clock from 1MHz source. I'm using CoolRunner-II CPLD ...
- 957
7
votes
2
answers
369
views
Export restrictions on programming equipment
I have a friend that works for an overseas manufacturer. He sells programming equipment to companies that have products with multiple Programmable Controllers embedded. I raised the subject of "export ...
- 71
5
votes
3
answers
4k
views
Is this a good use of a CPLD?
I am trying to generate some waveforms which are phase shifted from an input signal.
The input signal is around 4.4 MHz and is a square wave at 50% duty. I need a 0 degree and 90 degree phase shift ...
- 32.2k
1
vote
1
answer
7k
views
COM differences between input and output in PLC
See below for a wiring diagram of the I/O of a PLC (model: Omron CP1L).
Input:
Output:
What does the input side has many input but only one COM, but on the output side there are more COM grouped ...
- 1,448
3
votes
1
answer
9k
views
How to wire the output of a PLC
I have question regarding the wiring of the output of PLC (mode: Omron CP1L). Below is the output wiring diagram.
The PLC is AC powered, and input are 24 VDC. As the image shows, the output has a "+"...
- 1,448
37
votes
7
answers
27k
views
Are there any Analog FPGAs?
As I understand it FPGAs are flexible "digital" circuits, that let you design and build and rebuild a digital circuit.
It might sound naive or silly but I was wondering if there are FPGAs or other "...
- 915
4
votes
1
answer
3k
views
What was the protocol for programming GAL devices?
What actually has to happen, at a pins and signals level, to program a GAL device? Let's say I have a GAL 22V10, and a .JED file with the desired fuse pattern. The usual way to proceed is to drop the ...
- 19.3k
2
votes
3
answers
2k
views
Modular PCB Design
I'm designing a basic harness continuity checker based on shift registers implemented in Max V CPLDs. I'm aiming for a modular/extendable PCB design for the project as it has several benefits (cost, ...
- 5,439
2
votes
1
answer
1k
views
Logic Buffers for CPLDs Outputs (and Inputs?)
Today, I tried to use a ULN2003a darlington array as a buffer for my CPLD's outputs. While it works well, I have a concern. The max. voltage where the Max V is guaranteed to read a low is 0.8V. The ...
- 5,439
5
votes
3
answers
2k
views
How can I increase the number of hardware UARTs in a design with a single UART MCU?
I am using a TI CC430 MCU because it contains an embedded CC1101 radio frontend. I would really like to stick with this MCU. However, I need to simultaneously interact with a separate serial radio, a ...
- 407
3
votes
1
answer
371
views
Increasing current capability of a Pin
This is a followup from my previous question.
Here's a summary of how the circuit works:
I'm designing a circuit that can test for short circuits and open circuits in a wiring harness. The wiring ...
- 5,439
3
votes
3
answers
1k
views
Bus Contention - Output Pin driving another Output Pin
I've run into an unusual problem. I'll start off by describing my goal: I'm designing a circuit that can test for short circuits and open circuits in a wiring harness. The wiring harness does not have ...
- 5,439
3
votes
4
answers
6k
views
What software I can use for CPLD programming?
I would like to learn more about CPLD circuits (because they are cheaper than FPGA), but I am facing a major problem. I cannot find any simple and userfriendly software for programing and debugging ...
- 957
2
votes
1
answer
384
views
Any nice way to use unbonded CPLD pins as registers
Many CPLD product families offer each chip in multiple packages, some of which don't bond all I/O pads out to pins. Even I/O pads which aren't bonded to pins, however, may be useful if they have bus-...
- 47.3k
3
votes
1
answer
2k
views
Strange bug when Interfacing with Shift Register (CPLD) via SPI
I've implemented a 8-bit Parallel in Serial Out (PISO) Shift register in VHDL on my Max V CPLD. I'm using SPI to interface with the CPLD using my AVR. The circuit works but only partially. Suppose I ...
- 5,439
8
votes
3
answers
4k
views
When is a FPGA preferred instead of a CPLD, and vice versa?
I am starting out with programmable logic, and I am mostly using schematic entry. (Hey, I like to see the schematic instead of VHDL/VERILOG :P)
I have been using a Xilinx CPLD originally that had 128 ...
- 1,090
4
votes
3
answers
2k
views
FPGAs or CPLDs for "Glue Logic" and Video/LCD Capabilities
Some of you may remember I posted a question in which it was suggested that I use CPLDs instead of a large number of multiplexers. Here is the question, for reference.
However, as I read and learn ...
- 5,439
6
votes
3
answers
2k
views
Getting Started with Altera CPLDs
I'm looking for recommendations regarding development kits for Altera CPLD prototyping but I'm afraid I'm not sure what to look for. The budget isn't too much - around $200. While I'm leaning towards ...
- 5,439
1
vote
1
answer
1k
views
Pull-down's on CPLD
So I have a Xilinx CoolRunner II CPLD that I'm working with that is talking to conditionally powered peripherals. I'm using the CPLD as a kind of logic level translator between a microcontroller and ...
- 3,517
0
votes
1
answer
2k
views
Video signal attenuation
Which is the best way to attenuate a video signal?
I need to reduce the Vpp (Peak-to-Peak Voltage) from 2V of a PAL video signal to 0.75V. I am familiar with filters and amplifiers (like Op-Amp ...
- 249
6
votes
9
answers
1k
views
Any programmable devices available for more modern languages?
Pardon my naïveté, but it seems like most programmable devices (FPGAs, PLCs, PICs, etc.) are programmable using the C or C++ languages, or a variant of one of these. Are there any devices out there ...
- 163
10
votes
2
answers
4k
views
What are my less expensive options for getting started with CPLDs [closed]
I would like to goof around with some CPLD stuff and I see I have a couple options out there. I don't have a particular application in mind; it just seems like there a lot of possibilities, some of ...
- 951
4
votes
2
answers
2k
views
Image processing on PAL/NTSC
I want to process a PAL or NTSC video signal and pick up colors, like green, orange, blue and red. Is there any way to decode RGB from NTSC/PAL easily, and then detect these colours? I'm looking for a ...
- 32.2k
3
votes
2
answers
2k
views
How many transistors/logic gates are used in the signal path between a TV studio and the restitution of the image on my HD-TV?
How many transistors/logic gates are used in the signal path between a TV studio and the restitution of the image on my HD-TV ?
You see what I mean ? I need a rough estimation...:-)
I especially ...
- 397
4
votes
1
answer
191
views
Is it standard for a VSD to pull its power from the controlling PLC? Is this the better solution?
We have an industrial floor that is opened and closed by a variable speed drive motor. This is controlled by a PLC device. Recently we had to do maintenance on the VSD. The serviceman incorrectly ...
- 248
10
votes
4
answers
4k
views
What are programmable logic ICs of different complexity used for?
Programmable logic can be implemented in your widget in many different spectrums, from burning a few gates or using a MUX to the latest FPGA with built-in microcontroller and IO peripherals, not to ...
- 8,297
11
votes
4
answers
2k
views
Is there an inexpensive way to get started with GAL (Generic Array Logic) chips?
GAL chips seem expensive to get started with, since programmers cost hundreds of dollars and even ISP cables aren't cheap.
Is there a cheaper way?
- 1,211
9
votes
4
answers
53k
views
What is the difference between PLA and ROM?
I'm finding it hard to understand. What is the difference between PLA and ROM? Can somebody please provide a link or explanation?
hello